decoder.isa (11725:eb58f1bbeac8) decoder.isa (11726:11950d45640b)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2015 RISC-V Foundation
4// Copyright (c) 2016 The University of Virginia
5// All rights reserved.
6//
7// Redistribution and use in source and binary forms, with or without
8// modification, are permitted provided that the following conditions are

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161 Mem_uw = (uint32_t)Fs2_bits;
162 }});
163 0x3: fsd({{
164 Mem_ud = Fs2_bits;
165 }});
166 }
167 }
168
1// -*- mode:c++ -*-
2
3// Copyright (c) 2015 RISC-V Foundation
4// Copyright (c) 2016 The University of Virginia
5// All rights reserved.
6//
7// Redistribution and use in source and binary forms, with or without
8// modification, are permitted provided that the following conditions are

--- 152 unchanged lines hidden (view full) ---

161 Mem_uw = (uint32_t)Fs2_bits;
162 }});
163 0x3: fsd({{
164 Mem_ud = Fs2_bits;
165 }});
166 }
167 }
168
169 0x2f: decode FUNCT3 {
170 0x2: decode AMOFUNCT {
171 0x2: LoadReserved::lr_w({{
172 Rd_sd = Mem_sw;
173 }}, mem_flags=LLSC, aq=AQ, rl=RL);
174 0x3: StoreCond::sc_w({{
175 Mem_uw = Rs2_uw;
176 }}, {{
177 Rd = result;
178 }}, inst_flags=IsStoreConditional, mem_flags=LLSC, aq=AQ, rl=RL);
179 format AtomicMemOp {
180 0x0: amoadd_w({{Rt_sd = Mem_sw;}}, {{
181 Mem_sw = Rs2_sw + Rt_sd;
182 Rd_sd = Rt_sd;
183 }}, {{EA = Rs1;}});
184 0x1: amoswap_w({{Rt_sd = Mem_sw;}}, {{
185 Mem_sw = Rs2_uw;
186 Rd_sd = Rt_sd;
187 }}, {{EA = Rs1;}});
188 0x4: amoxor_w({{Rt_sd = Mem_sw;}}, {{
189 Mem_sw = Rs2_uw^Rt_sd;
190 Rd_sd = Rt_sd;
191 }}, {{EA = Rs1;}});
192 0x8: amoor_w({{Rt_sd = Mem_sw;}}, {{
193 Mem_sw = Rs2_uw | Rt_sd;
194 Rd_sd = Rt_sd;
195 }}, {{EA = Rs1;}});
196 0xc: amoand_w({{Rt_sd = Mem_sw;}}, {{
197 Mem_sw = Rs2_uw&Rt_sd;
198 Rd_sd = Rt_sd;
199 }}, {{EA = Rs1;}});
200 0x10: amomin_w({{Rt_sd = Mem_sw;}}, {{
201 Mem_sw = std::min<int32_t>(Rs2_sw, Rt_sd);
202 Rd_sd = Rt_sd;
203 }}, {{EA = Rs1;}});
204 0x14: amomax_w({{Rt_sd = Mem_sw;}}, {{
205 Mem_sw = std::max<int32_t>(Rs2_sw, Rt_sd);
206 Rd_sd = Rt_sd;
207 }}, {{EA = Rs1;}});
208 0x18: amominu_w({{Rt_sd = Mem_sw;}}, {{
209 Mem_sw = std::min<uint32_t>(Rs2_uw, Rt_sd);
210 Rd_sd = Rt_sd;
211 }}, {{EA = Rs1;}});
212 0x1c: amomaxu_w({{Rt_sd = Mem_sw;}}, {{
213 Mem_sw = std::max<uint32_t>(Rs2_uw, Rt_sd);
214 Rd_sd = Rt_sd;
215 }}, {{EA = Rs1;}});
216 }
217 }
218 0x3: decode AMOFUNCT {
219 0x2: LoadReserved::lr_d({{
220 Rd_sd = Mem_sd;
221 }}, aq=AQ, rl=RL);
222 0x3: StoreCond::sc_d({{
223 Mem = Rs2;
224 }}, {{
225 Rd = result;
226 }}, aq=AQ, rl=RL);
227 format AtomicMemOp {
228 0x0: amoadd_d({{Rt_sd = Mem_sd;}}, {{
229 Mem_sd = Rs2_sd + Rt_sd;
230 Rd_sd = Rt_sd;
231 }}, {{EA = Rs1;}});
232 0x1: amoswap_d({{Rt = Mem;}}, {{
233 Mem = Rs2;
234 Rd = Rt;
235 }}, {{EA = Rs1;}});
236 0x4: amoxor_d({{Rt = Mem;}}, {{
237 Mem = Rs2^Rt;
238 Rd = Rt;
239 }}, {{EA = Rs1;}});
240 0x8: amoor_d({{Rt = Mem;}}, {{
241 Mem = Rs2 | Rt;
242 Rd = Rt;
243 }}, {{EA = Rs1;}});
244 0xc: amoand_d({{Rt = Mem;}}, {{
245 Mem = Rs2&Rt;
246 Rd = Rt;
247 }}, {{EA = Rs1;}});
248 0x10: amomin_d({{Rt_sd = Mem_sd;}}, {{
249 Mem_sd = std::min(Rs2_sd, Rt_sd);
250 Rd_sd = Rt_sd;
251 }}, {{EA = Rs1;}});
252 0x14: amomax_d({{Rt_sd = Mem_sd;}}, {{
253 Mem_sd = std::max(Rs2_sd, Rt_sd);
254 Rd_sd = Rt_sd;
255 }}, {{EA = Rs1;}});
256 0x18: amominu_d({{Rt = Mem;}}, {{
257 Mem = std::min(Rs2, Rt);
258 Rd = Rt;
259 }}, {{EA = Rs1;}});
260 0x1c: amomaxu_d({{Rt = Mem;}}, {{
261 Mem = std::max(Rs2, Rt);
262 Rd = Rt;
263 }}, {{EA = Rs1;}});
264 }
265 }
266 }
169 0x33: decode FUNCT3 {
170 format ROp {
171 0x0: decode FUNCT7 {
172 0x0: add({{
173 Rd = Rs1_sd + Rs2_sd;
174 }});
175 0x1: mul({{
176 Rd = Rs1_sd*Rs2_sd;

--- 1109 unchanged lines hidden --- 		267 0x33: decode FUNCT3 {
268 format ROp {
269 0x0: decode FUNCT7 {
270 0x0: add({{
271 Rd = Rs1_sd + Rs2_sd;
272 }});
273 0x1: mul({{
274 Rd = Rs1_sd*Rs2_sd;

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