1// -*- mode:c++ -*-
2
3// Copyright (c) 2015 RISC-V Foundation
4// Copyright (c) 2017 The University of Virginia
5// All rights reserved.
6//
7// Redistribution and use in source and binary forms, with or without
8// modification, are permitted provided that the following conditions are

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1333 0x60: decode CONV_SGN {
1334 0x0: fcvt_w_s({{
1335 uint32_t temp;
1336 float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
1337
1338 if (std::isnan(fs1)) {
1339 Rd_sd = numeric_limits<int32_t>::max();
1340 FFLAGS |= FloatInvalid;
1341 } else {
1342 Rd_sd = (int32_t)fs1;
1343 if (fetestexcept(FE_INVALID)) {
1344 if (signbit(fs1)) {
1345 Rd_sd = numeric_limits<int32_t>::min();
1346 } else {
1347 Rd_sd = numeric_limits<int32_t>::max();
1348 }
1349 feclearexcept(FE_INEXACT);
1350 }
1351 }
1352 }}, FloatCvtOp);
1353 0x1: fcvt_wu_s({{
1354 uint32_t temp;
1355 float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
1356
1357 if (fs1 < 0.0) {
1358 Rd = 0;
1359 FFLAGS |= FloatInvalid;
1360 } else {
1361 Rd = (uint32_t)fs1;
1362 if (fetestexcept(FE_INVALID)) {
1363 Rd = numeric_limits<uint64_t>::max();
1364 feclearexcept(FE_INEXACT);
1365 }
1366 }
1367 }}, FloatCvtOp);
1368 0x2: fcvt_l_s({{
1369 uint32_t temp;
1370 float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
1371
1372 if (std::isnan(fs1)) {
1373 Rd_sd = numeric_limits<int64_t>::max();
1374 FFLAGS |= FloatInvalid;
1375 } else {
1376 Rd_sd = (int64_t)fs1;
1377 if (fetestexcept(FE_INVALID)) {
1378 if (signbit(fs1)) {
1379 Rd_sd = numeric_limits<int64_t>::min();
1380 } else {
1381 Rd_sd = numeric_limits<int64_t>::max();
1382 }
1383 feclearexcept(FE_INEXACT);
1384 }
1385 }
1386 }}, FloatCvtOp);
1387 0x3: fcvt_lu_s({{
1388 uint32_t temp;
1389 float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
1390
1391 if (fs1 < 0.0) {
1392 Rd = 0;
1393 FFLAGS |= FloatInvalid;
1394 } else {
1395 Rd = (uint64_t)fs1;
1396 if (fetestexcept(FE_INVALID)) {
1397 Rd = numeric_limits<uint64_t>::max();
1398 feclearexcept(FE_INEXACT);
1399 }
1400 }
1401 }}, FloatCvtOp);
1402 }
1403 0x61: decode CONV_SGN {
1404 0x0: fcvt_w_d({{
1405 Rd_sd = (int32_t)Fs1;
1406 if (fetestexcept(FE_INVALID)) {
1407 if (Fs1 < 0.0) {
1408 Rd_sd = numeric_limits<int32_t>::min();
1409 } else {
1410 Rd_sd = numeric_limits<int32_t>::max();
1411 }
1412 feclearexcept(FE_INEXACT);
1413 }
1414 }}, FloatCvtOp);
1415 0x1: fcvt_wu_d({{
1416 if (Fs1 < 0.0) {
1417 Rd = 0;
1418 FFLAGS |= FloatInvalid;
1419 } else {
1420 Rd = (uint32_t)Fs1;
1421 if (fetestexcept(FE_INVALID)) {
1422 Rd = numeric_limits<uint64_t>::max();
1423 feclearexcept(FE_INEXACT);
1424 }
1425 }
1426 }}, FloatCvtOp);
1427 0x2: fcvt_l_d({{
1428 Rd_sd = Fs1;
1429 if (fetestexcept(FE_INVALID)) {
1430 if (Fs1 < 0.0) {
1431 Rd_sd = numeric_limits<int64_t>::min();
1432 } else {
1433 Rd_sd = numeric_limits<int64_t>::max();
1434 }
1435 feclearexcept(FE_INEXACT);
1436 }
1437 }}, FloatCvtOp);
1438 0x3: fcvt_lu_d({{
1439 if (Fs1 < 0.0) {
1440 Rd = 0;
1441 FFLAGS |= FloatInvalid;
1442 } else {
1443 Rd = (uint64_t)Fs1;
1444 if (fetestexcept(FE_INVALID)) {
1445 Rd = numeric_limits<uint64_t>::max();
1446 feclearexcept(FE_INEXACT);
1447 }
1448 }
1449 }}, FloatCvtOp);
1450 }
1451 0x68: decode CONV_SGN {
1452 0x0: fcvt_s_w({{
1453 float temp = (float)Rs1_sw;
1454 Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp);
1455 }}, FloatCvtOp);

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