211 Trace::InstRecord *traceData) const 212 { 213 return NoFault; 214 } 215}}; 216 217 218// The generic memory operation generator. This is called when two versions 219// of an instruction are needed - when Ra == 0 and otherwise. This is so 220// that instructions can use the value 0 when Ra == 0 but avoid having a 221// dependence on Ra. 222let {{ 223 224def GenMemOp(name, Name, memacc_code, ea_code, ea_code_ra0, base, 225 load_or_store, mem_flags = [], inst_flags = []): 226 227 # First the version where Ra is non-zero 228 (header_output, decoder_output, decode_block, exec_output) = \ 229 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 230 base_class = base, 231 decode_template = CheckRaDecode, 232 exec_template_base = load_or_store) 233 234 # Now another version where Ra == 0 235 (header_output_ra0, decoder_output_ra0, _, exec_output_ra0) = \ 236 LoadStoreBase(name, Name + 'RaZero', ea_code_ra0, memacc_code, 237 mem_flags, inst_flags, 238 base_class = base, 239 exec_template_base = load_or_store) 240 241 # Finally, add to the other outputs 242 header_output += header_output_ra0 243 decoder_output += decoder_output_ra0 244 exec_output += exec_output_ra0 245 return (header_output, decoder_output, decode_block, exec_output) 246 247}}; 248 249 250def format LoadIndexOp(memacc_code, ea_code = {{ EA = Ra + Rb; }}, 251 ea_code_ra0 = {{ EA = Rb; }}, 252 mem_flags = [], inst_flags = []) {{ 253 (header_output, decoder_output, decode_block, exec_output) = \ 254 GenMemOp(name, Name, memacc_code, ea_code, ea_code_ra0, 255 'MemOp', 'Load', mem_flags, inst_flags) 256}}; 257 258 259def format StoreIndexOp(memacc_code, ea_code = {{ EA = Ra + Rb; }}, 260 ea_code_ra0 = {{ EA = Rb; }}, 261 mem_flags = [], inst_flags = []) {{ 262 (header_output, decoder_output, decode_block, exec_output) = \ 263 GenMemOp(name, Name, memacc_code, ea_code, ea_code_ra0, 264 'MemOp', 'Store', mem_flags, inst_flags) 265}}; 266 267 268def format LoadIndexUpdateOp(memacc_code, ea_code = {{ EA = Ra + Rb; }}, 269 mem_flags = [], inst_flags = []) {{ 270 271 # Add in the update code 272 memacc_code += 'Ra = EA;' 273 274 # Generate the class 275 (header_output, decoder_output, decode_block, exec_output) = \ 276 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 277 base_class = 'MemOp', 278 exec_template_base = 'Load') 279}}; 280 281 282def format StoreIndexUpdateOp(memacc_code, ea_code = {{ EA = Ra + Rb; }}, 283 mem_flags = [], inst_flags = []) {{ 284 285 # Add in the update code 286 memacc_code += 'Ra = EA;' 287 288 # Generate the class 289 (header_output, decoder_output, decode_block, exec_output) = \ 290 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 291 base_class = 'MemOp', 292 exec_template_base = 'Store') 293}}; 294 295 296def format LoadDispOp(memacc_code, ea_code = {{ EA = Ra + disp; }}, 297 ea_code_ra0 = {{ EA = disp; }}, 298 mem_flags = [], inst_flags = []) {{ 299 (header_output, decoder_output, decode_block, exec_output) = \ 300 GenMemOp(name, Name, memacc_code, ea_code, ea_code_ra0, 301 'MemDispOp', 'Load', mem_flags, inst_flags) 302}}; 303 304 305def format StoreDispOp(memacc_code, ea_code = {{ EA = Ra + disp; }}, 306 ea_code_ra0 = {{ EA = disp; }}, 307 mem_flags = [], inst_flags = []) {{ 308 (header_output, decoder_output, decode_block, exec_output) = \ 309 GenMemOp(name, Name, memacc_code, ea_code, ea_code_ra0, 310 'MemDispOp', 'Store', mem_flags, inst_flags) 311}}; 312 313 314def format LoadDispUpdateOp(memacc_code, ea_code = {{ EA = Ra + disp; }}, 315 mem_flags = [], inst_flags = []) {{ 316 317 # Add in the update code 318 memacc_code += 'Ra = EA;' 319 320 # Generate the class 321 (header_output, decoder_output, decode_block, exec_output) = \ 322 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 323 base_class = 'MemDispOp', 324 exec_template_base = 'Load') 325}}; 326 327 328def format StoreDispUpdateOp(memacc_code, ea_code = {{ EA = Ra + disp; }}, 329 mem_flags = [], inst_flags = []) {{ 330 331 # Add in the update code 332 memacc_code += 'Ra = EA;' 333 334 # Generate the class 335 (header_output, decoder_output, decode_block, exec_output) = \ 336 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 337 base_class = 'MemDispOp', 338 exec_template_base = 'Store') 339}};
| 210 Trace::InstRecord *traceData) const 211 { 212 return NoFault; 213 } 214}}; 215 216 217// The generic memory operation generator. This is called when two versions 218// of an instruction are needed - when Ra == 0 and otherwise. This is so 219// that instructions can use the value 0 when Ra == 0 but avoid having a 220// dependence on Ra. 221let {{ 222 223def GenMemOp(name, Name, memacc_code, ea_code, ea_code_ra0, base, 224 load_or_store, mem_flags = [], inst_flags = []): 225 226 # First the version where Ra is non-zero 227 (header_output, decoder_output, decode_block, exec_output) = \ 228 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 229 base_class = base, 230 decode_template = CheckRaDecode, 231 exec_template_base = load_or_store) 232 233 # Now another version where Ra == 0 234 (header_output_ra0, decoder_output_ra0, _, exec_output_ra0) = \ 235 LoadStoreBase(name, Name + 'RaZero', ea_code_ra0, memacc_code, 236 mem_flags, inst_flags, 237 base_class = base, 238 exec_template_base = load_or_store) 239 240 # Finally, add to the other outputs 241 header_output += header_output_ra0 242 decoder_output += decoder_output_ra0 243 exec_output += exec_output_ra0 244 return (header_output, decoder_output, decode_block, exec_output) 245 246}}; 247 248 249def format LoadIndexOp(memacc_code, ea_code = {{ EA = Ra + Rb; }}, 250 ea_code_ra0 = {{ EA = Rb; }}, 251 mem_flags = [], inst_flags = []) {{ 252 (header_output, decoder_output, decode_block, exec_output) = \ 253 GenMemOp(name, Name, memacc_code, ea_code, ea_code_ra0, 254 'MemOp', 'Load', mem_flags, inst_flags) 255}}; 256 257 258def format StoreIndexOp(memacc_code, ea_code = {{ EA = Ra + Rb; }}, 259 ea_code_ra0 = {{ EA = Rb; }}, 260 mem_flags = [], inst_flags = []) {{ 261 (header_output, decoder_output, decode_block, exec_output) = \ 262 GenMemOp(name, Name, memacc_code, ea_code, ea_code_ra0, 263 'MemOp', 'Store', mem_flags, inst_flags) 264}}; 265 266 267def format LoadIndexUpdateOp(memacc_code, ea_code = {{ EA = Ra + Rb; }}, 268 mem_flags = [], inst_flags = []) {{ 269 270 # Add in the update code 271 memacc_code += 'Ra = EA;' 272 273 # Generate the class 274 (header_output, decoder_output, decode_block, exec_output) = \ 275 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 276 base_class = 'MemOp', 277 exec_template_base = 'Load') 278}}; 279 280 281def format StoreIndexUpdateOp(memacc_code, ea_code = {{ EA = Ra + Rb; }}, 282 mem_flags = [], inst_flags = []) {{ 283 284 # Add in the update code 285 memacc_code += 'Ra = EA;' 286 287 # Generate the class 288 (header_output, decoder_output, decode_block, exec_output) = \ 289 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 290 base_class = 'MemOp', 291 exec_template_base = 'Store') 292}}; 293 294 295def format LoadDispOp(memacc_code, ea_code = {{ EA = Ra + disp; }}, 296 ea_code_ra0 = {{ EA = disp; }}, 297 mem_flags = [], inst_flags = []) {{ 298 (header_output, decoder_output, decode_block, exec_output) = \ 299 GenMemOp(name, Name, memacc_code, ea_code, ea_code_ra0, 300 'MemDispOp', 'Load', mem_flags, inst_flags) 301}}; 302 303 304def format StoreDispOp(memacc_code, ea_code = {{ EA = Ra + disp; }}, 305 ea_code_ra0 = {{ EA = disp; }}, 306 mem_flags = [], inst_flags = []) {{ 307 (header_output, decoder_output, decode_block, exec_output) = \ 308 GenMemOp(name, Name, memacc_code, ea_code, ea_code_ra0, 309 'MemDispOp', 'Store', mem_flags, inst_flags) 310}}; 311 312 313def format LoadDispUpdateOp(memacc_code, ea_code = {{ EA = Ra + disp; }}, 314 mem_flags = [], inst_flags = []) {{ 315 316 # Add in the update code 317 memacc_code += 'Ra = EA;' 318 319 # Generate the class 320 (header_output, decoder_output, decode_block, exec_output) = \ 321 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 322 base_class = 'MemDispOp', 323 exec_template_base = 'Load') 324}}; 325 326 327def format StoreDispUpdateOp(memacc_code, ea_code = {{ EA = Ra + disp; }}, 328 mem_flags = [], inst_flags = []) {{ 329 330 # Add in the update code 331 memacc_code += 'Ra = EA;' 332 333 # Generate the class 334 (header_output, decoder_output, decode_block, exec_output) = \ 335 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 336 base_class = 'MemDispOp', 337 exec_template_base = 'Store') 338}};
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