tlb.hh (12406:86bde4a026b5) | tlb.hh (12749:223c83ed9979) |
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1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 90 unchanged lines hidden (view full) --- 99 void demapPage(Addr vaddr, uint64_t asn) override 100 { 101 panic("demapPage unimplemented.\n"); 102 } 103 104 // static helper functions... really 105 static bool validVirtualAddress(Addr vaddr); 106 | 1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 90 unchanged lines hidden (view full) --- 99 void demapPage(Addr vaddr, uint64_t asn) override 100 { 101 panic("demapPage unimplemented.\n"); 102 } 103 104 // static helper functions... really 105 static bool validVirtualAddress(Addr vaddr); 106 |
107 static Fault checkCacheability(RequestPtr &req); | 107 static Fault checkCacheability(const RequestPtr &req); |
108 109 // Checkpointing 110 void serialize(CheckpointOut &cp) const override; 111 void unserialize(CheckpointIn &cp) override; 112 113 void regStats() override; 114 115 Fault translateAtomic( | 108 109 // Checkpointing 110 void serialize(CheckpointOut &cp) const override; 111 void unserialize(CheckpointIn &cp) override; 112 113 void regStats() override; 114 115 Fault translateAtomic( |
116 RequestPtr req, ThreadContext *tc, Mode mode) override; | 116 const RequestPtr &req, ThreadContext *tc, Mode mode) override; |
117 void translateTiming( | 117 void translateTiming( |
118 RequestPtr req, ThreadContext *tc, | 118 const RequestPtr &req, ThreadContext *tc, |
119 Translation *translation, Mode mode) override; 120 Fault finalizePhysical( | 119 Translation *translation, Mode mode) override; 120 Fault finalizePhysical( |
121 RequestPtr req, ThreadContext *tc, Mode mode) const override; | 121 const RequestPtr &req, 122 ThreadContext *tc, Mode mode) const override; |
122 123 private: | 123 124 private: |
124 Fault translateInst(RequestPtr req, ThreadContext *tc); 125 Fault translateData(RequestPtr req, ThreadContext *tc, bool write); | 125 Fault translateInst(const RequestPtr &req, ThreadContext *tc); 126 Fault translateData(const RequestPtr &req, ThreadContext *tc, bool write); |
126}; 127 128} 129 130 131 132#endif // __MIPS_MEMORY_HH__ | 127}; 128 129} 130 131 132 133#endif // __MIPS_MEMORY_HH__ |