tlb.hh (11347:faf5195f6ca7) | tlb.hh (12406:86bde4a026b5) |
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1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 98 unchanged lines hidden (view full) --- 107 static Fault checkCacheability(RequestPtr &req); 108 109 // Checkpointing 110 void serialize(CheckpointOut &cp) const override; 111 void unserialize(CheckpointIn &cp) override; 112 113 void regStats() override; 114 | 1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 98 unchanged lines hidden (view full) --- 107 static Fault checkCacheability(RequestPtr &req); 108 109 // Checkpointing 110 void serialize(CheckpointOut &cp) const override; 111 void unserialize(CheckpointIn &cp) override; 112 113 void regStats() override; 114 |
115 Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode); 116 void translateTiming(RequestPtr req, ThreadContext *tc, 117 Translation *translation, Mode mode); | 115 Fault translateAtomic( 116 RequestPtr req, ThreadContext *tc, Mode mode) override; 117 void translateTiming( 118 RequestPtr req, ThreadContext *tc, 119 Translation *translation, Mode mode) override; 120 Fault finalizePhysical( 121 RequestPtr req, ThreadContext *tc, Mode mode) const override; |
118 | 122 |
119 /** Function stub for CheckerCPU compilation issues. MIPS does not 120 * support the Checker model at the moment. 121 */ 122 Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode); 123 Fault finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const; 124 | |
125 private: 126 Fault translateInst(RequestPtr req, ThreadContext *tc); 127 Fault translateData(RequestPtr req, ThreadContext *tc, bool write); 128}; 129 130} 131 132 133 134#endif // __MIPS_MEMORY_HH__ | 123 private: 124 Fault translateInst(RequestPtr req, ThreadContext *tc); 125 Fault translateData(RequestPtr req, ThreadContext *tc, bool write); 126}; 127 128} 129 130 131 132#endif // __MIPS_MEMORY_HH__ |