isa_traits.hh (9040:cdfe09f9bdee) | isa_traits.hh (9057:f5ee56466b91) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 129 unchanged lines hidden (view full) --- 138 mode_kernel = 0, // kernel 139 mode_supervisor = 1, // supervisor 140 mode_user = 2, // user mode 141 mode_debug = 3, // debug mode 142 mode_number // number of modes 143}; 144 145// return a no-op instruction... used for instruction fetch faults | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 129 unchanged lines hidden (view full) --- 138 mode_kernel = 0, // kernel 139 mode_supervisor = 1, // supervisor 140 mode_user = 2, // user mode 141 mode_debug = 3, // debug mode 142 mode_number // number of modes 143}; 144 145// return a no-op instruction... used for instruction fetch faults |
146const extern StaticInstPtr NoopStaticInst; | 146const ExtMachInst NoopMachInst = 0x00000000; |
147 148const int LogVMPageSize = 13; // 8K bytes 149const int VMPageSize = (1 << LogVMPageSize); 150 151const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned 152 153const int MachineBytes = 4; 154const int WordBytes = 4; 155const int HalfwordBytes = 2; 156const int ByteBytes = 1; 157 158const int ANNOTE_NONE = 0; 159const uint32_t ITOUCH_ANNOTE = 0xffffffff; 160 161const bool HasUnalignedMemAcc = true; 162 163} // namespace MipsISA 164 165#endif // __ARCH_MIPS_ISA_TRAITS_HH__ | 147 148const int LogVMPageSize = 13; // 8K bytes 149const int VMPageSize = (1 << LogVMPageSize); 150 151const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned 152 153const int MachineBytes = 4; 154const int WordBytes = 4; 155const int HalfwordBytes = 2; 156const int ByteBytes = 1; 157 158const int ANNOTE_NONE = 0; 159const uint32_t ITOUCH_ANNOTE = 0xffffffff; 160 161const bool HasUnalignedMemAcc = true; 162 163} // namespace MipsISA 164 165#endif // __ARCH_MIPS_ISA_TRAITS_HH__ |