isa_traits.hh (2680:246e7104f744) isa_traits.hh (2754:e3d023bc752c)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 43 unchanged lines hidden (view full) ---

52
53namespace LittleEndianGuest {};
54
55#define TARGET_MIPS
56
57class StaticInst;
58class StaticInstPtr;
59
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 43 unchanged lines hidden (view full) ---

52
53namespace LittleEndianGuest {};
54
55#define TARGET_MIPS
56
57class StaticInst;
58class StaticInstPtr;
59
60namespace MIPS34K {
61int DTB_ASN_ASN(uint64_t reg);
62int ITB_ASN_ASN(uint64_t reg);
63};
64
65#if !FULL_SYSTEM
66class SyscallReturn {
67 public:
68 template <class T>
69 SyscallReturn(T v, bool s)
70 {
71 retval = (uint32_t)v;
72 success = s;
73 }

--- 16 unchanged lines hidden (view full) ---

90 bool successful() { return success; }
91 uint64_t value() { return retval; }
92
93
94 private:
95 uint64_t retval;
96 bool success;
97};
60class SyscallReturn {
61 public:
62 template <class T>
63 SyscallReturn(T v, bool s)
64 {
65 retval = (uint32_t)v;
66 success = s;
67 }

--- 16 unchanged lines hidden (view full) ---

84 bool successful() { return success; }
85 uint64_t value() { return retval; }
86
87
88 private:
89 uint64_t retval;
90 bool success;
91};
98#endif
99
100namespace MipsISA
101{
102 using namespace LittleEndianGuest;
103
104 static inline void setSyscallReturn(SyscallReturn return_value, RegFile *regs)
105 {
106 if (return_value.successful()) {

--- 28 unchanged lines hidden (view full) ---

135 */
136 template <class TC>
137 void zeroRegisters(TC *tc);
138
139 const Addr MaxAddr = (Addr)-1;
140
141 void copyRegs(ThreadContext *src, ThreadContext *dest);
142
92
93namespace MipsISA
94{
95 using namespace LittleEndianGuest;
96
97 static inline void setSyscallReturn(SyscallReturn return_value, RegFile *regs)
98 {
99 if (return_value.successful()) {

--- 28 unchanged lines hidden (view full) ---

128 */
129 template <class TC>
130 void zeroRegisters(TC *tc);
131
132 const Addr MaxAddr = (Addr)-1;
133
134 void copyRegs(ThreadContext *src, ThreadContext *dest);
135
143 uint64_t fpConvert(double fp_val, ConvertType cvt_type);
144 double roundFP(double val, int digits);
145 double truncFP(double val);
146 bool getFPConditionCode(uint32_t fcsr_reg, int cc);
147 uint32_t makeCCVector(uint32_t fcsr, int num, bool val);
148
149 // Machine operations
150
151 void saveMachineReg(AnyReg &savereg, const RegFile &reg_file,
152 int regnum);
153
154 void restoreMachineReg(RegFile &regs, const AnyReg &reg,
155 int regnum);
156

--- 29 unchanged lines hidden (view full) ---

186
187 static inline MachInst makeRegisterCopy(int dest, int src) {
188 panic("makeRegisterCopy not implemented");
189 return 0;
190 }
191
192};
193
136 // Machine operations
137
138 void saveMachineReg(AnyReg &savereg, const RegFile &reg_file,
139 int regnum);
140
141 void restoreMachineReg(RegFile &regs, const AnyReg &reg,
142 int regnum);
143

--- 29 unchanged lines hidden (view full) ---

173
174 static inline MachInst makeRegisterCopy(int dest, int src) {
175 panic("makeRegisterCopy not implemented");
176 return 0;
177 }
178
179};
180
194#if FULL_SYSTEM
195
196#include "arch/mips/mips34k.hh"
197
198#endif
199
200using namespace MipsISA;
201
202#endif // __ARCH_MIPS_ISA_TRAITS_HH__
181using namespace MipsISA;
182
183#endif // __ARCH_MIPS_ISA_TRAITS_HH__