1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 43 unchanged lines hidden (view full) --- 52 53namespace LittleEndianGuest {}; 54 55#define TARGET_MIPS 56 57class StaticInst; 58class StaticInstPtr; 59 |
60class SyscallReturn { 61 public: 62 template <class T> 63 SyscallReturn(T v, bool s) 64 { 65 retval = (uint32_t)v; 66 success = s; 67 } --- 16 unchanged lines hidden (view full) --- 84 bool successful() { return success; } 85 uint64_t value() { return retval; } 86 87 88 private: 89 uint64_t retval; 90 bool success; 91}; |
92 93namespace MipsISA 94{ 95 using namespace LittleEndianGuest; 96 97 static inline void setSyscallReturn(SyscallReturn return_value, RegFile *regs) 98 { 99 if (return_value.successful()) { --- 28 unchanged lines hidden (view full) --- 128 */ 129 template <class TC> 130 void zeroRegisters(TC *tc); 131 132 const Addr MaxAddr = (Addr)-1; 133 134 void copyRegs(ThreadContext *src, ThreadContext *dest); 135 |
136 // Machine operations 137 138 void saveMachineReg(AnyReg &savereg, const RegFile ®_file, 139 int regnum); 140 141 void restoreMachineReg(RegFile ®s, const AnyReg ®, 142 int regnum); 143 --- 29 unchanged lines hidden (view full) --- 173 174 static inline MachInst makeRegisterCopy(int dest, int src) { 175 panic("makeRegisterCopy not implemented"); 176 return 0; 177 } 178 179}; 180 |
181using namespace MipsISA; 182 183#endif // __ARCH_MIPS_ISA_TRAITS_HH__ |