1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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55 const Addr PageMask = ~(PageBytes - 1);
56 const Addr PageOffset = PageBytes - 1;
57
58 // return a no-op instruction... used for instruction fetch faults
59 const ExtMachInst NoopMachInst = 0x00000000;
60
61 // Constants Related to the number of registers
62 const int NumIntArchRegs = 32;
63 const int NumIntSpecialRegs = 2;
64 const int NumFloatArchRegs = 32;
65 const int NumFloatSpecialRegs = 5;
66 const int NumControlRegs = 265;
67 const int NumInternalProcRegs = 0;
68
69 const int NumIntRegs = NumIntArchRegs + NumIntSpecialRegs; //HI & LO Regs
70 const int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs;//
71 const int NumMiscRegs = NumControlRegs;
72
73 const int TotalNumRegs = NumIntRegs + NumFloatRegs +
74 NumMiscRegs + 0/*NumInternalProcRegs*/;
75
76 const int TotalDataRegs = NumIntRegs + NumFloatRegs;
77
78 // Static instruction parameters
79 const int MaxInstSrcRegs = 3;
80 const int MaxInstDestRegs = 2;
81
82 // semantically meaningful register indices
83 const int ZeroReg = 0;
84 const int AssemblerReg = 1;
85 const int ReturnValueReg = 2;
86 const int ReturnValueReg1 = 2;
87 const int ReturnValueReg2 = 3;
88 const int ArgumentReg0 = 4;
89 const int ArgumentReg1 = 5;
90 const int ArgumentReg2 = 6;
91 const int ArgumentReg3 = 7;
92 const int KernelReg0 = 26;
93 const int KernelReg1 = 27;
94 const int GlobalPointerReg = 28;
95 const int StackPointerReg = 29;
96 const int FramePointerReg = 30;
97 const int ReturnAddressReg = 31;
98
99 const int SyscallNumReg = ReturnValueReg1;
100 const int SyscallPseudoReturnReg = ReturnValueReg1;
101 const int SyscallSuccessReg = ArgumentReg3;
102
103 const int LogVMPageSize = 13; // 8K bytes
104 const int VMPageSize = (1 << LogVMPageSize);
105
106 const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned
107
108 const int MachineBytes = 4;
109 const int WordBytes = 4;
110 const int HalfwordBytes = 2;
111 const int ByteBytes = 1;
112
113 // These help enumerate all the registers for dependence tracking.
114 const int FP_Base_DepTag = 34;
115 const int Ctrl_Base_DepTag = 257;
116
117 const int ANNOTE_NONE = 0;
118 const uint32_t ITOUCH_ANNOTE = 0xffffffff;
119
120};
121
122using namespace MipsISA;
123
124#endif // __ARCH_MIPS_ISA_TRAITS_HH__