1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 131 unchanged lines hidden (view full) ---

140 mode_user = 2, // user mode
141 mode_debug = 3, // debug mode
142 mode_number // number of modes
143};
144
145// return a no-op instruction... used for instruction fetch faults
146const ExtMachInst NoopMachInst = 0x00000000;
147
148const int ANNOTE_NONE = 0;
149const uint32_t ITOUCH_ANNOTE = 0xffffffff;
150
151const bool HasUnalignedMemAcc = true;
152
153const bool CurThreadInfoImplemented = false;
154const int CurThreadInfoReg = -1;
155
156} // namespace MipsISA
157
158#endif // __ARCH_MIPS_ISA_TRAITS_HH__