1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright
9// notice, this list of conditions and the following disclaimer;
10// redistributions in binary form must reproduce the above copyright
11// notice, this list of conditions and the following disclaimer in the
12// documentation and/or other materials provided with the distribution;
13// neither the name of the copyright holders nor the names of its
14// contributors may be used to endorse or promote products derived from
15// this software without specific prior written permission.
16//
17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28//
29// Authors: Korey Sewell
30
31////////////////////////////////////////////////////////////////////
32//
33// Base class for MIPS instructions, and some support functions
34//
35
36//Outputs to decoder.hh
37output header {{
38
39 using namespace MipsISA;
40
41 /**
42 * Base class for all MIPS static instructions.
43 */
44 class MipsStaticInst : public StaticInst
45 {
46 protected:
47
48 // Constructor
49 MipsStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
50 : StaticInst(mnem, _machInst, __opClass)
51 {
52 }
53
54 /// Print a register name for disassembly given the unique
55 /// dependence tag number (FP or int).
56 void printReg(std::ostream &os, RegId reg) const;
57
58 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
59
60 public:
61 void
62 advancePC(MipsISA::PCState &pc) const
63 {
64 pc.advance();
65 }
| 1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright
9// notice, this list of conditions and the following disclaimer;
10// redistributions in binary form must reproduce the above copyright
11// notice, this list of conditions and the following disclaimer in the
12// documentation and/or other materials provided with the distribution;
13// neither the name of the copyright holders nor the names of its
14// contributors may be used to endorse or promote products derived from
15// this software without specific prior written permission.
16//
17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28//
29// Authors: Korey Sewell
30
31////////////////////////////////////////////////////////////////////
32//
33// Base class for MIPS instructions, and some support functions
34//
35
36//Outputs to decoder.hh
37output header {{
38
39 using namespace MipsISA;
40
41 /**
42 * Base class for all MIPS static instructions.
43 */
44 class MipsStaticInst : public StaticInst
45 {
46 protected:
47
48 // Constructor
49 MipsStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
50 : StaticInst(mnem, _machInst, __opClass)
51 {
52 }
53
54 /// Print a register name for disassembly given the unique
55 /// dependence tag number (FP or int).
56 void printReg(std::ostream &os, RegId reg) const;
57
58 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
59
60 public:
61 void
62 advancePC(MipsISA::PCState &pc) const
63 {
64 pc.advance();
65 }
|
66 };
67
68}};
69
70//Ouputs to decoder.cc
71output decoder {{
72
73 void MipsStaticInst::printReg(std::ostream &os, RegId reg) const
74 {
75 if (reg.isIntReg()) {
76 ccprintf(os, "r%d", reg.index());
77 }
78 else {
79 ccprintf(os, "f%d", reg.index());
80 }
81 }
82
83 std::string MipsStaticInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const
84 {
85 std::stringstream ss;
86
87 ccprintf(ss, "%-10s ", mnemonic);
88
89 // Need to find standard way to not print
90 // this info. Maybe add bool variable to
91 // class?
92 if (strcmp(mnemonic, "syscall") != 0) {
93 if(_numDestRegs > 0){
94 printReg(ss, _destRegIdx[0]);
95 }
96
97 if(_numSrcRegs > 0) {
98 ss << ", ";
99 printReg(ss, _srcRegIdx[0]);
100 }
101
102 if(_numSrcRegs > 1) {
103 ss << ", ";
104 printReg(ss, _srcRegIdx[1]);
105 }
106 }
107
108 // Should we define a separate inst. class
109 // just for two insts?
110 if (strcmp(mnemonic, "sll") == 0 || strcmp(mnemonic, "sra") == 0) {
111 ccprintf(ss,", %d",SA);
112 }
113
114 return ss.str();
115 }
116
117}};
118
| 72 };
73
74}};
75
76//Ouputs to decoder.cc
77output decoder {{
78
79 void MipsStaticInst::printReg(std::ostream &os, RegId reg) const
80 {
81 if (reg.isIntReg()) {
82 ccprintf(os, "r%d", reg.index());
83 }
84 else {
85 ccprintf(os, "f%d", reg.index());
86 }
87 }
88
89 std::string MipsStaticInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const
90 {
91 std::stringstream ss;
92
93 ccprintf(ss, "%-10s ", mnemonic);
94
95 // Need to find standard way to not print
96 // this info. Maybe add bool variable to
97 // class?
98 if (strcmp(mnemonic, "syscall") != 0) {
99 if(_numDestRegs > 0){
100 printReg(ss, _destRegIdx[0]);
101 }
102
103 if(_numSrcRegs > 0) {
104 ss << ", ";
105 printReg(ss, _srcRegIdx[0]);
106 }
107
108 if(_numSrcRegs > 1) {
109 ss << ", ";
110 printReg(ss, _srcRegIdx[1]);
111 }
112 }
113
114 // Should we define a separate inst. class
115 // just for two insts?
116 if (strcmp(mnemonic, "sll") == 0 || strcmp(mnemonic, "sra") == 0) {
117 ccprintf(ss,", %d",SA);
118 }
119
120 return ss.str();
121 }
122
123}};
124
|