decl.hh (11639:2e8d4bd8108d) decl.hh (11692:e772fdcd3809)
1/*
2 * Copyright (c) 2012-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

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33 * Author: Steve Reinhardt
34 */
35
36#ifndef __ARCH_HSAIL_INSTS_DECL_HH__
37#define __ARCH_HSAIL_INSTS_DECL_HH__
38
39#include <cmath>
40
1/*
2 * Copyright (c) 2012-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

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33 * Author: Steve Reinhardt
34 */
35
36#ifndef __ARCH_HSAIL_INSTS_DECL_HH__
37#define __ARCH_HSAIL_INSTS_DECL_HH__
38
39#include <cmath>
40
41#include "arch/hsail/generic_types.hh"
42#include "arch/hsail/insts/gpu_static_inst.hh"
43#include "arch/hsail/operand.hh"
44#include "debug/HSAIL.hh"
41#include "arch/hsail/insts/gpu_static_inst.hh"
42#include "arch/hsail/operand.hh"
43#include "debug/HSAIL.hh"
45#include "enums/OpType.hh"
46#include "gpu-compute/gpu_dyn_inst.hh"
47#include "gpu-compute/shader.hh"
48
49namespace HsailISA
50{
51 template<typename _DestOperand, typename _SrcOperand>
52 class HsailOperandType
53 {

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122
123 virtual std::string opcode_suffix() = 0;
124
125 public:
126 CommonInstBase(const Brig::BrigInstBase *ib, const BrigObject *obj,
127 const char *opcode)
128 : HsailGPUStaticInst(obj, opcode)
129 {
44#include "gpu-compute/gpu_dyn_inst.hh"
45#include "gpu-compute/shader.hh"
46
47namespace HsailISA
48{
49 template<typename _DestOperand, typename _SrcOperand>
50 class HsailOperandType
51 {

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120
121 virtual std::string opcode_suffix() = 0;
122
123 public:
124 CommonInstBase(const Brig::BrigInstBase *ib, const BrigObject *obj,
125 const char *opcode)
126 : HsailGPUStaticInst(obj, opcode)
127 {
128 setFlag(ALU);
129
130 unsigned op_offs = obj->getOperandPtr(ib->operands, 0);
131
132 dest.init(op_offs, obj);
133
134 for (int i = 0; i < NumSrcOperands; ++i) {
135 op_offs = obj->getOperandPtr(ib->operands, i + 1);
136 src[i].init(op_offs, obj);
137 }

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235 }
236
237 public:
238 ThreeNonUniformSourceInstBase(const Brig::BrigInstBase *ib,
239 const BrigObject *obj,
240 const char *opcode)
241 : HsailGPUStaticInst(obj, opcode)
242 {
130 unsigned op_offs = obj->getOperandPtr(ib->operands, 0);
131
132 dest.init(op_offs, obj);
133
134 for (int i = 0; i < NumSrcOperands; ++i) {
135 op_offs = obj->getOperandPtr(ib->operands, i + 1);
136 src[i].init(op_offs, obj);
137 }

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235 }
236
237 public:
238 ThreeNonUniformSourceInstBase(const Brig::BrigInstBase *ib,
239 const BrigObject *obj,
240 const char *opcode)
241 : HsailGPUStaticInst(obj, opcode)
242 {
243 setFlag(ALU);
244
243 unsigned op_offs = obj->getOperandPtr(ib->operands, 0);
244 dest.init(op_offs, obj);
245
246 op_offs = obj->getOperandPtr(ib->operands, 1);
247 src0.init(op_offs, obj);
248
249 op_offs = obj->getOperandPtr(ib->operands, 2);
250 src1.init(op_offs, obj);

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409 }
410
411
412 public:
413 TwoNonUniformSourceInstBase(const Brig::BrigInstBase *ib,
414 const BrigObject *obj, const char *opcode)
415 : HsailGPUStaticInst(obj, opcode)
416 {
245 unsigned op_offs = obj->getOperandPtr(ib->operands, 0);
246 dest.init(op_offs, obj);
247
248 op_offs = obj->getOperandPtr(ib->operands, 1);
249 src0.init(op_offs, obj);
250
251 op_offs = obj->getOperandPtr(ib->operands, 2);
252 src1.init(op_offs, obj);

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411 }
412
413
414 public:
415 TwoNonUniformSourceInstBase(const Brig::BrigInstBase *ib,
416 const BrigObject *obj, const char *opcode)
417 : HsailGPUStaticInst(obj, opcode)
418 {
419 setFlag(ALU);
420
417 unsigned op_offs = obj->getOperandPtr(ib->operands, 0);
418 dest.init(op_offs, obj);
419
420 op_offs = obj->getOperandPtr(ib->operands, 1);
421 src0.init(op_offs, obj);
422
423 op_offs = obj->getOperandPtr(ib->operands, 2);
424 src1.init(op_offs, obj);

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813 src0.disassemble());
814 }
815
816 public:
817 SpecialInst1SrcBase(const Brig::BrigInstBase *ib,
818 const BrigObject *obj, const char *_opcode)
819 : HsailGPUStaticInst(obj, _opcode)
820 {
421 unsigned op_offs = obj->getOperandPtr(ib->operands, 0);
422 dest.init(op_offs, obj);
423
424 op_offs = obj->getOperandPtr(ib->operands, 1);
425 src0.init(op_offs, obj);
426
427 op_offs = obj->getOperandPtr(ib->operands, 2);
428 src1.init(op_offs, obj);

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817 src0.disassemble());
818 }
819
820 public:
821 SpecialInst1SrcBase(const Brig::BrigInstBase *ib,
822 const BrigObject *obj, const char *_opcode)
823 : HsailGPUStaticInst(obj, _opcode)
824 {
825 setFlag(ALU);
826
821 unsigned op_offs = obj->getOperandPtr(ib->operands, 0);
822 dest.init(op_offs, obj);
823
824 op_offs = obj->getOperandPtr(ib->operands, 1);
825 src0.init(op_offs, obj);
826 }
827 bool isVectorRegister(int operandIndex) {
828 assert((operandIndex >= 0) && (operandIndex < getNumOperands()));

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869 class Ret : public SpecialInstNoSrcNoDest
870 {
871 public:
872 typedef SpecialInstNoSrcNoDest Base;
873
874 Ret(const Brig::BrigInstBase *ib, const BrigObject *obj)
875 : Base(ib, obj, "ret")
876 {
827 unsigned op_offs = obj->getOperandPtr(ib->operands, 0);
828 dest.init(op_offs, obj);
829
830 op_offs = obj->getOperandPtr(ib->operands, 1);
831 src0.init(op_offs, obj);
832 }
833 bool isVectorRegister(int operandIndex) {
834 assert((operandIndex >= 0) && (operandIndex < getNumOperands()));

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875 class Ret : public SpecialInstNoSrcNoDest
876 {
877 public:
878 typedef SpecialInstNoSrcNoDest Base;
879
880 Ret(const Brig::BrigInstBase *ib, const BrigObject *obj)
881 : Base(ib, obj, "ret")
882 {
877 o_type = Enums::OT_RET;
883 setFlag(GPUStaticInst::Return);
878 }
879
880 void execute(GPUDynInstPtr gpuDynInst);
881 };
882
883 class Barrier : public SpecialInstNoSrcNoDest
884 {
885 public:
886 typedef SpecialInstNoSrcNoDest Base;
887 uint8_t width;
888
889 Barrier(const Brig::BrigInstBase *ib, const BrigObject *obj)
890 : Base(ib, obj, "barrier")
891 {
884 }
885
886 void execute(GPUDynInstPtr gpuDynInst);
887 };
888
889 class Barrier : public SpecialInstNoSrcNoDest
890 {
891 public:
892 typedef SpecialInstNoSrcNoDest Base;
893 uint8_t width;
894
895 Barrier(const Brig::BrigInstBase *ib, const BrigObject *obj)
896 : Base(ib, obj, "barrier")
897 {
892 o_type = Enums::OT_BARRIER;
898 setFlag(GPUStaticInst::MemBarrier);
893 assert(ib->base.kind == Brig::BRIG_KIND_INST_BR);
894 width = (uint8_t)((Brig::BrigInstBr*)ib)->width;
895 }
896
897 void execute(GPUDynInstPtr gpuDynInst);
898 };
899
900 class MemFence : public SpecialInstNoSrcNoDest

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919 ((Brig::BrigInstMemFence*)ib)->groupSegmentMemoryScope;
920
921 memFenceScopeSegImage = (Brig::BrigMemoryScope)
922 ((Brig::BrigInstMemFence*)ib)->imageSegmentMemoryScope;
923
924 memFenceMemOrder = (Brig::BrigMemoryOrder)
925 ((Brig::BrigInstMemFence*)ib)->memoryOrder;
926
899 assert(ib->base.kind == Brig::BRIG_KIND_INST_BR);
900 width = (uint8_t)((Brig::BrigInstBr*)ib)->width;
901 }
902
903 void execute(GPUDynInstPtr gpuDynInst);
904 };
905
906 class MemFence : public SpecialInstNoSrcNoDest

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925 ((Brig::BrigInstMemFence*)ib)->groupSegmentMemoryScope;
926
927 memFenceScopeSegImage = (Brig::BrigMemoryScope)
928 ((Brig::BrigInstMemFence*)ib)->imageSegmentMemoryScope;
929
930 memFenceMemOrder = (Brig::BrigMemoryOrder)
931 ((Brig::BrigInstMemFence*)ib)->memoryOrder;
932
927 // set o_type based on scopes
933 setFlag(MemoryRef);
934 setFlag(GPUStaticInst::MemFence);
935
936 switch (memFenceMemOrder) {
937 case Brig::BRIG_MEMORY_ORDER_NONE:
938 setFlag(NoOrder);
939 break;
940 case Brig::BRIG_MEMORY_ORDER_RELAXED:
941 setFlag(RelaxedOrder);
942 break;
943 case Brig::BRIG_MEMORY_ORDER_SC_ACQUIRE:
944 setFlag(Acquire);
945 break;
946 case Brig::BRIG_MEMORY_ORDER_SC_RELEASE:
947 setFlag(Release);
948 break;
949 case Brig::BRIG_MEMORY_ORDER_SC_ACQUIRE_RELEASE:
950 setFlag(AcquireRelease);
951 break;
952 default:
953 fatal("MemInst has bad BrigMemoryOrder\n");
954 }
955
956 // set inst flags based on scopes
928 if (memFenceScopeSegGlobal != Brig::BRIG_MEMORY_SCOPE_NONE &&
929 memFenceScopeSegGroup != Brig::BRIG_MEMORY_SCOPE_NONE) {
957 if (memFenceScopeSegGlobal != Brig::BRIG_MEMORY_SCOPE_NONE &&
958 memFenceScopeSegGroup != Brig::BRIG_MEMORY_SCOPE_NONE) {
930 o_type = Enums::OT_BOTH_MEMFENCE;
959 setFlag(GPUStaticInst::GlobalSegment);
960
961 /**
962 * A memory fence that has scope for
963 * both segments will use the global
964 * segment, and be executed in the
965 * global memory pipeline, therefore,
966 * we set the segment to match the
967 * global scope only
968 */
969 switch (memFenceScopeSegGlobal) {
970 case Brig::BRIG_MEMORY_SCOPE_NONE:
971 setFlag(NoScope);
972 break;
973 case Brig::BRIG_MEMORY_SCOPE_WORKITEM:
974 setFlag(WorkitemScope);
975 break;
976 case Brig::BRIG_MEMORY_SCOPE_WORKGROUP:
977 setFlag(WorkgroupScope);
978 break;
979 case Brig::BRIG_MEMORY_SCOPE_AGENT:
980 setFlag(DeviceScope);
981 break;
982 case Brig::BRIG_MEMORY_SCOPE_SYSTEM:
983 setFlag(SystemScope);
984 break;
985 default:
986 fatal("MemFence has bad global scope type\n");
987 }
931 } else if (memFenceScopeSegGlobal != Brig::BRIG_MEMORY_SCOPE_NONE) {
988 } else if (memFenceScopeSegGlobal != Brig::BRIG_MEMORY_SCOPE_NONE) {
932 o_type = Enums::OT_GLOBAL_MEMFENCE;
989 setFlag(GPUStaticInst::GlobalSegment);
990
991 switch (memFenceScopeSegGlobal) {
992 case Brig::BRIG_MEMORY_SCOPE_NONE:
993 setFlag(NoScope);
994 break;
995 case Brig::BRIG_MEMORY_SCOPE_WORKITEM:
996 setFlag(WorkitemScope);
997 break;
998 case Brig::BRIG_MEMORY_SCOPE_WORKGROUP:
999 setFlag(WorkgroupScope);
1000 break;
1001 case Brig::BRIG_MEMORY_SCOPE_AGENT:
1002 setFlag(DeviceScope);
1003 break;
1004 case Brig::BRIG_MEMORY_SCOPE_SYSTEM:
1005 setFlag(SystemScope);
1006 break;
1007 default:
1008 fatal("MemFence has bad global scope type\n");
1009 }
933 } else if (memFenceScopeSegGroup != Brig::BRIG_MEMORY_SCOPE_NONE) {
1010 } else if (memFenceScopeSegGroup != Brig::BRIG_MEMORY_SCOPE_NONE) {
934 o_type = Enums::OT_SHARED_MEMFENCE;
1011 setFlag(GPUStaticInst::GroupSegment);
1012
1013 switch (memFenceScopeSegGroup) {
1014 case Brig::BRIG_MEMORY_SCOPE_NONE:
1015 setFlag(NoScope);
1016 break;
1017 case Brig::BRIG_MEMORY_SCOPE_WORKITEM:
1018 setFlag(WorkitemScope);
1019 break;
1020 case Brig::BRIG_MEMORY_SCOPE_WORKGROUP:
1021 setFlag(WorkgroupScope);
1022 break;
1023 case Brig::BRIG_MEMORY_SCOPE_AGENT:
1024 setFlag(DeviceScope);
1025 break;
1026 case Brig::BRIG_MEMORY_SCOPE_SYSTEM:
1027 setFlag(SystemScope);
1028 break;
1029 default:
1030 fatal("MemFence has bad group scope type\n");
1031 }
935 } else {
936 fatal("MemFence constructor: bad scope specifiers\n");
937 }
938 }
939
940 void
941 initiateAcc(GPUDynInstPtr gpuDynInst)
942 {

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950 Wavefront *w = gpuDynInst->wavefront();
951 // 2 cases:
952 // * memfence to a sequentially consistent memory (e.g., LDS).
953 // These can be handled as no-ops.
954 // * memfence to a relaxed consistency cache (e.g., Hermes, Viper,
955 // etc.). We send a packet, tagged with the memory order and
956 // scope, and let the GPU coalescer handle it.
957
1032 } else {
1033 fatal("MemFence constructor: bad scope specifiers\n");
1034 }
1035 }
1036
1037 void
1038 initiateAcc(GPUDynInstPtr gpuDynInst)
1039 {

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1047 Wavefront *w = gpuDynInst->wavefront();
1048 // 2 cases:
1049 // * memfence to a sequentially consistent memory (e.g., LDS).
1050 // These can be handled as no-ops.
1051 // * memfence to a relaxed consistency cache (e.g., Hermes, Viper,
1052 // etc.). We send a packet, tagged with the memory order and
1053 // scope, and let the GPU coalescer handle it.
1054
958 if (o_type == Enums::OT_GLOBAL_MEMFENCE ||
959 o_type == Enums::OT_BOTH_MEMFENCE) {
1055 if (isGlobalSeg()) {
960 gpuDynInst->simdId = w->simdId;
961 gpuDynInst->wfSlotId = w->wfSlotId;
962 gpuDynInst->wfDynId = w->wfDynId;
963 gpuDynInst->kern_id = w->kernId;
964 gpuDynInst->cu_id = w->computeUnit->cu_id;
965
1056 gpuDynInst->simdId = w->simdId;
1057 gpuDynInst->wfSlotId = w->wfSlotId;
1058 gpuDynInst->wfDynId = w->wfDynId;
1059 gpuDynInst->kern_id = w->kernId;
1060 gpuDynInst->cu_id = w->computeUnit->cu_id;
1061
966 gpuDynInst->memoryOrder =
967 getGenericMemoryOrder(memFenceMemOrder);
968 gpuDynInst->scope =
969 getGenericMemoryScope(memFenceScopeSegGlobal);
970 gpuDynInst->useContinuation = false;
971 GlobalMemPipeline* gmp = &(w->computeUnit->globalMemoryPipe);
972 gmp->getGMReqFIFO().push(gpuDynInst);
973
974 w->wrGmReqsInPipe--;
975 w->rdGmReqsInPipe--;
976 w->memReqsInPipe--;
977 w->outstandingReqs++;
1062 gpuDynInst->useContinuation = false;
1063 GlobalMemPipeline* gmp = &(w->computeUnit->globalMemoryPipe);
1064 gmp->getGMReqFIFO().push(gpuDynInst);
1065
1066 w->wrGmReqsInPipe--;
1067 w->rdGmReqsInPipe--;
1068 w->memReqsInPipe--;
1069 w->outstandingReqs++;
978 } else if (o_type == Enums::OT_SHARED_MEMFENCE) {
1070 } else if (isGroupSeg()) {
979 // no-op
980 } else {
1071 // no-op
1072 } else {
981 fatal("MemFence execute: bad o_type\n");
1073 fatal("MemFence execute: bad op type\n");
982 }
983 }
984 };
985
986 class Call : public HsailGPUStaticInst
987 {
988 public:
989 // private helper functions

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1049 void MagicMostSigBroadcast(Wavefront *w);
1050
1051 void MagicPrintWF32ID(Wavefront *w);
1052 void MagicPrintWFID64(Wavefront *w);
1053
1054 Call(const Brig::BrigInstBase *ib, const BrigObject *obj)
1055 : HsailGPUStaticInst(obj, "call")
1056 {
1074 }
1075 }
1076 };
1077
1078 class Call : public HsailGPUStaticInst
1079 {
1080 public:
1081 // private helper functions

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1141 void MagicMostSigBroadcast(Wavefront *w);
1142
1143 void MagicPrintWF32ID(Wavefront *w);
1144 void MagicPrintWFID64(Wavefront *w);
1145
1146 Call(const Brig::BrigInstBase *ib, const BrigObject *obj)
1147 : HsailGPUStaticInst(obj, "call")
1148 {
1149 setFlag(ALU);
1057 unsigned op_offs = obj->getOperandPtr(ib->operands, 0);
1058 dest.init(op_offs, obj);
1059 op_offs = obj->getOperandPtr(ib->operands, 1);
1060 src0.init(op_offs, obj);
1061
1062 func_ptr = nullptr;
1063 std::string func_name = src0.disassemble();
1064 if (!isPseudoOp()) {

--- 42 unchanged lines hidden --- 		1150 unsigned op_offs = obj->getOperandPtr(ib->operands, 0);
1151 dest.init(op_offs, obj);
1152 op_offs = obj->getOperandPtr(ib->operands, 1);
1153 src0.init(op_offs, obj);
1154
1155 func_ptr = nullptr;
1156 std::string func_name = src0.disassemble();
1157 if (!isPseudoOp()) {

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