utility.hh (6246:5744fafb5072) utility.hh (6251:1d794d81a4e6)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007-2008 The Florida State University
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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30 * Stephen Hines
31 */
32
33#ifndef __ARCH_ARM_UTILITY_HH__
34#define __ARCH_ARM_UTILITY_HH__
35
36#include "arch/arm/miscregs.hh"
37#include "arch/arm/types.hh"
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007-2008 The Florida State University
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 21 unchanged lines hidden (view full) ---

30 * Stephen Hines
31 */
32
33#ifndef __ARCH_ARM_UTILITY_HH__
34#define __ARCH_ARM_UTILITY_HH__
35
36#include "arch/arm/miscregs.hh"
37#include "arch/arm/types.hh"
38#include "base/hashmap.hh"
38#include "base/types.hh"
39#include "cpu/thread_context.hh"
40
39#include "base/types.hh"
40#include "cpu/thread_context.hh"
41
42namespace __hash_namespace {
43 template<>
44 struct hash<ArmISA::ExtMachInst> : public hash<uint32_t> {
45 size_t operator()(const ArmISA::ExtMachInst &emi) const {
46 return hash<uint32_t>::operator()((uint32_t)emi);
47 };
48 };
49}
50
41namespace ArmISA {
42
43 inline bool
44 testPredicate(CPSR cpsr, ConditionCode code)
45 {
46 switch (code)
47 {
48 case COND_EQ: return cpsr.z;

--- 61 unchanged lines hidden --- 		51namespace ArmISA {
52
53 inline bool
54 testPredicate(CPSR cpsr, ConditionCode code)
55 {
56 switch (code)
57 {
58 case COND_EQ: return cpsr.z;

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