59,65c59,65
< inline PCState
< buildRetPC(const PCState &curPC, const PCState &callPC)
< {
< PCState retPC = callPC;
< retPC.uEnd();
< return retPC;
< }
---
> inline PCState
> buildRetPC(const PCState &curPC, const PCState &callPC)
> {
> PCState retPC = callPC;
> retPC.uEnd();
> return retPC;
> }
67,68c67,70
< inline bool
< testPredicate(CPSR cpsr, ConditionCode code)
---
> inline bool
> testPredicate(CPSR cpsr, ConditionCode code)
> {
> switch (code)
70,90c72,89
< switch (code)
< {
< case COND_EQ: return cpsr.z;
< case COND_NE: return !cpsr.z;
< case COND_CS: return cpsr.c;
< case COND_CC: return !cpsr.c;
< case COND_MI: return cpsr.n;
< case COND_PL: return !cpsr.n;
< case COND_VS: return cpsr.v;
< case COND_VC: return !cpsr.v;
< case COND_HI: return (cpsr.c && !cpsr.z);
< case COND_LS: return !(cpsr.c && !cpsr.z);
< case COND_GE: return !(cpsr.n ^ cpsr.v);
< case COND_LT: return (cpsr.n ^ cpsr.v);
< case COND_GT: return !(cpsr.n ^ cpsr.v || cpsr.z);
< case COND_LE: return (cpsr.n ^ cpsr.v || cpsr.z);
< case COND_AL: return true;
< case COND_UC: return true;
< default:
< panic("Unhandled predicate condition: %d\n", code);
< }
---
> case COND_EQ: return cpsr.z;
> case COND_NE: return !cpsr.z;
> case COND_CS: return cpsr.c;
> case COND_CC: return !cpsr.c;
> case COND_MI: return cpsr.n;
> case COND_PL: return !cpsr.n;
> case COND_VS: return cpsr.v;
> case COND_VC: return !cpsr.v;
> case COND_HI: return (cpsr.c && !cpsr.z);
> case COND_LS: return !(cpsr.c && !cpsr.z);
> case COND_GE: return !(cpsr.n ^ cpsr.v);
> case COND_LT: return (cpsr.n ^ cpsr.v);
> case COND_GT: return !(cpsr.n ^ cpsr.v || cpsr.z);
> case COND_LE: return (cpsr.n ^ cpsr.v || cpsr.z);
> case COND_AL: return true;
> case COND_UC: return true;
> default:
> panic("Unhandled predicate condition: %d\n", code);
91a91
> }
93,98c93,98
< /**
< * Function to insure ISA semantics about 0 registers.
< * @param tc The thread context.
< */
< template <class TC>
< void zeroRegisters(TC *tc);
---
> /**
> * Function to insure ISA semantics about 0 registers.
> * @param tc The thread context.
> */
> template <class TC>
> void zeroRegisters(TC *tc);
100,103c100,103
< inline void startupCPU(ThreadContext *tc, int cpuId)
< {
< tc->activate(0);
< }
---
> inline void startupCPU(ThreadContext *tc, int cpuId)
> {
> tc->activate(0);
> }
105c105
< void copyRegs(ThreadContext *src, ThreadContext *dest);
---
> void copyRegs(ThreadContext *src, ThreadContext *dest);
107,111c107,111
< static inline void
< copyMiscRegs(ThreadContext *src, ThreadContext *dest)
< {
< panic("Copy Misc. Regs Not Implemented Yet\n");
< }
---
> static inline void
> copyMiscRegs(ThreadContext *src, ThreadContext *dest)
> {
> panic("Copy Misc. Regs Not Implemented Yet\n");
> }
113,119c113
< void initCPU(ThreadContext *tc, int cpuId);
<
< static inline bool
< inUserMode(CPSR cpsr)
< {
< return cpsr.mode == MODE_USER;
< }
---
> void initCPU(ThreadContext *tc, int cpuId);
121,125c115,119
< static inline bool
< inUserMode(ThreadContext *tc)
< {
< return inUserMode(tc->readMiscRegNoEffect(MISCREG_CPSR));
< }
---
> static inline bool
> inUserMode(CPSR cpsr)
> {
> return cpsr.mode == MODE_USER;
> }
127,131c121,125
< static inline bool
< inPrivilegedMode(CPSR cpsr)
< {
< return !inUserMode(cpsr);
< }
---
> static inline bool
> inUserMode(ThreadContext *tc)
> {
> return inUserMode(tc->readMiscRegNoEffect(MISCREG_CPSR));
> }
133,137c127,131
< static inline bool
< inPrivilegedMode(ThreadContext *tc)
< {
< return !inUserMode(tc);
< }
---
> static inline bool
> inPrivilegedMode(CPSR cpsr)
> {
> return !inUserMode(cpsr);
> }
139,144c133,137
< static inline bool
< vfpEnabled(CPACR cpacr, CPSR cpsr)
< {
< return cpacr.cp10 == 0x3 ||
< (cpacr.cp10 == 0x1 && inPrivilegedMode(cpsr));
< }
---
> static inline bool
> inPrivilegedMode(ThreadContext *tc)
> {
> return !inUserMode(tc);
> }
146,150c139,144
< static inline bool
< vfpEnabled(CPACR cpacr, CPSR cpsr, FPEXC fpexc)
< {
< return fpexc.en && vfpEnabled(cpacr, cpsr);
< }
---
> static inline bool
> vfpEnabled(CPACR cpacr, CPSR cpsr)
> {
> return cpacr.cp10 == 0x3 ||
> (cpacr.cp10 == 0x1 && inPrivilegedMode(cpsr));
> }
152,156c146,150
< static inline bool
< neonEnabled(CPACR cpacr, CPSR cpsr, FPEXC fpexc)
< {
< return !cpacr.asedis && vfpEnabled(cpacr, cpsr, fpexc);
< }
---
> static inline bool
> vfpEnabled(CPACR cpacr, CPSR cpsr, FPEXC fpexc)
> {
> return fpexc.en && vfpEnabled(cpacr, cpsr);
> }
157a152,157
> static inline bool
> neonEnabled(CPACR cpacr, CPSR cpsr, FPEXC fpexc)
> {
> return !cpacr.asedis && vfpEnabled(cpacr, cpsr, fpexc);
> }
>