1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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49#include "arch/arm/miscregs.hh"
50#include "arch/arm/types.hh"
51#include "base/misc.hh"
52#include "base/trace.hh"
53#include "base/types.hh"
54#include "cpu/static_inst.hh"
55#include "cpu/thread_context.hh"
56
57namespace ArmISA {
58
59inline PCState
60buildRetPC(const PCState &curPC, const PCState &callPC)
61{
62 PCState retPC = callPC;
63 retPC.uEnd();
64 return retPC;

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113 panic("Copy Misc. Regs Not Implemented Yet\n");
114}
115
116void initCPU(ThreadContext *tc, int cpuId);
117
118static inline bool
119inUserMode(CPSR cpsr)
120{
121 return cpsr.mode == MODE_USER;
122}
123
124static inline bool
125inUserMode(ThreadContext *tc)
126{
127 return inUserMode(tc->readMiscRegNoEffect(MISCREG_CPSR));
128}
129

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134}
135
136static inline bool
137inPrivilegedMode(ThreadContext *tc)
138{
139 return !inUserMode(tc);
140}
141
142static inline bool
143vfpEnabled(CPACR cpacr, CPSR cpsr)
144{
145 return cpacr.cp10 == 0x3 ||
146 (cpacr.cp10 == 0x1 && inPrivilegedMode(cpsr));
147}
148
149static inline bool
150vfpEnabled(CPACR cpacr, CPSR cpsr, FPEXC fpexc)
151{
152 if ((cpacr.cp11 == 0x3) ||
153 ((cpacr.cp11 == 0x1) && inPrivilegedMode(cpsr)))
154 return fpexc.en && vfpEnabled(cpacr, cpsr);
155 else
156 return fpexc.en && vfpEnabled(cpacr, cpsr) &&
157 (cpacr.cp11 == cpacr.cp10);
158}
159
160static inline bool
161neonEnabled(CPACR cpacr, CPSR cpsr, FPEXC fpexc)
162{
163 return !cpacr.asedis && vfpEnabled(cpacr, cpsr, fpexc);
164}
165
166uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
167
168void skipFunction(ThreadContext *tc);
169
170inline void
171advancePC(PCState &pc, const StaticInstPtr inst)
172{
173 inst->advancePC(pc);
174}
175
176Addr truncPage(Addr addr);
177Addr roundPage(Addr addr);
178
179inline uint64_t
180getExecutingAsid(ThreadContext *tc)
181{
182 return tc->readMiscReg(MISCREG_CONTEXTIDR);
183}
184
185}
186
187#endif