1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 98 unchanged lines hidden (view full) --- 107 wbDiff = -8 108 if self.add: 109 wbDiff = 8 110 accCode = ''' 111 CPSR cpsr = Cpsr; 112 Mem.ud = (uint64_t)cSwap(LR.uw, cpsr.e) | 113 ((uint64_t)cSwap(Spsr.uw, cpsr.e) << 32); 114 ''' |
115 116 global header_output, decoder_output, exec_output 117 118 codeBlobs = { "ea_code": eaCode, 119 "memacc_code": accCode, 120 "postacc_code": "" } 121 codeBlobs["predicate_test"] = pickPredicate(codeBlobs) 122 |
123 wbDecl = None 124 if self.writeback: 125 wbDecl = '''MicroAddiUop(machInst, 126 intRegInMode((OperatingMode)regMode, INTREG_SP), 127 intRegInMode((OperatingMode)regMode, INTREG_SP), 128 %d);''' % wbDiff 129 |
130 (newHeader, 131 newDecoder, 132 newExec) = self.fillTemplates(self.name, self.Name, codeBlobs, 133 ["ArmISA::TLB::AlignWord", "ArmISA::TLB::MustBeOne"], [], |
134 'SrsOp', wbDecl) |
135 136 header_output += newHeader 137 decoder_output += newDecoder 138 exec_output += newExec 139 140 class StoreImmInst(StoreInst): 141 def __init__(self, *args, **kargs): 142 super(StoreImmInst, self).__init__(*args, **kargs) --- 237 unchanged lines hidden --- |