Deleted Added
sdiff udiff text old ( 7132:83b433d6e600 ) new ( 7279:157b02cc0ba1 )
full compact
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 47 unchanged lines hidden (view full) ---

56 def storeDoubleImmClassName(post, add, writeback):
57 return memClassName("STORE_IMMD", post, add, writeback,
58 4, False, False)
59
60 def storeDoubleRegClassName(post, add, writeback):
61 return memClassName("STORE_REGD", post, add, writeback,
62 4, False, False)
63
64 def emitStore(name, Name, imm, eaCode, accCode, \
65 memFlags, instFlags, base, double=False):
66 global header_output, decoder_output, exec_output
67
68 (newHeader,
69 newDecoder,
70 newExec) = loadStoreBase(name, Name, imm,
71 eaCode, accCode,
72 memFlags, instFlags, double,
73 base, execTemplateBase = 'Store')
74
75 header_output += newHeader
76 decoder_output += newDecoder
77 exec_output += newExec
78
79 def buildImmStore(mnem, post, add, writeback, \
80 size=4, sign=False, user=False):

--- 54 unchanged lines hidden (view full) ---

135 op = " -"
136
137 offset = op + " imm"
138 eaCode = "EA = Base"
139 if not post:
140 eaCode += offset
141 eaCode += ";"
142
143 accCode = 'Mem.ud = (Dest.ud & mask(32)) | (Dest2.ud << 32);'
144 if writeback:
145 accCode += "Base = Base %s;\n" % offset
146 base = buildMemBase("MemoryDImm", post, writeback)
147
148 emitStore(name, Name, True, eaCode, accCode, \
149 [], [], base, double=True)
150
151 def buildDoubleRegStore(mnem, post, add, writeback):
152 name = mnem
153 Name = storeDoubleRegClassName(post, add, writeback)
154
155 if add:
156 op = " +"
157 else:
158 op = " -"
159
160 offset = op + " shift_rm_imm(Index, shiftAmt," + \
161 " shiftType, CondCodes<29:>)"
162 eaCode = "EA = Base"
163 if not post:
164 eaCode += offset
165 eaCode += ";"
166
167 accCode = 'Mem.ud = (Dest.ud & mask(32)) | (Dest2.ud << 32);'
168 if writeback:
169 accCode += "Base = Base %s;\n" % offset
170 base = buildMemBase("MemoryDReg", post, writeback)
171
172 emitStore(name, Name, False, eaCode, accCode, \
173 [], [], base, double=True)
174
175 def buildStores(mnem, size=4, sign=False, user=False):
176 buildImmStore(mnem, True, True, True, size, sign, user)
177 buildRegStore(mnem, True, True, True, size, sign, user)
178 buildImmStore(mnem, True, False, True, size, sign, user)
179 buildRegStore(mnem, True, False, True, size, sign, user)
180 buildImmStore(mnem, False, True, True, size, sign, user)
181 buildRegStore(mnem, False, True, True, size, sign, user)

--- 30 unchanged lines hidden ---