macromem.isa (7720:65d338a8dba4) macromem.isa (7797:998b217dcae7)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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88
89 microLdrRetUopCode = '''
90 CPSR cpsr = Cpsr;
91 SCTLR sctlr = Sctlr;
92 uint32_t newCpsr =
93 cpsrWriteByInstr(cpsr | CondCodes, Spsr, 0xF, true, sctlr.nmfi);
94 Cpsr = ~CondCodesMask & newCpsr;
95 CondCodes = CondCodesMask & newCpsr;
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 79 unchanged lines hidden (view full) ---

88
89 microLdrRetUopCode = '''
90 CPSR cpsr = Cpsr;
91 SCTLR sctlr = Sctlr;
92 uint32_t newCpsr =
93 cpsrWriteByInstr(cpsr | CondCodes, Spsr, 0xF, true, sctlr.nmfi);
94 Cpsr = ~CondCodesMask & newCpsr;
95 CondCodes = CondCodesMask & newCpsr;
96 ArmISA::PCState pc = PCS;
97 pc.instIWNPC(cSwap(Mem.uw, cpsr.e) | ((Spsr & 0x20) ? 1 : 0));
98 PCS = pc;
96 IWNPC = cSwap(Mem.uw, cpsr.e) | ((Spsr & 0x20) ? 1 : 0);
99 '''
100 microLdrRetUopIop = InstObjParams('ldr_ret_uop', 'MicroLdrRetUop',
101 'MicroMemOp',
102 {'memacc_code': microLdrRetUopCode,
103 'ea_code':
104 'EA = Rb + (up ? imm : -imm);',
105 'predicate_test': condPredicateTest},
106 ['IsMicroop','IsNonSpeculative','IsSerializeAfter'])

--- 548 unchanged lines hidden --- 		97 '''
98 microLdrRetUopIop = InstObjParams('ldr_ret_uop', 'MicroLdrRetUop',
99 'MicroMemOp',
100 {'memacc_code': microLdrRetUopCode,
101 'ea_code':
102 'EA = Rb + (up ? imm : -imm);',
103 'predicate_test': condPredicateTest},
104 ['IsMicroop','IsNonSpeculative','IsSerializeAfter'])

--- 548 unchanged lines hidden ---