macromem.isa (7639:8c09b7ff5b57) macromem.isa (7644:62873d5c2bfc)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 45 unchanged lines hidden (view full) ---

54 'ea_code': 'EA = Rb + (up ? imm : -imm);',
55 'predicate_test': predicateTest},
56 ['IsMicroop'])
57
58 microLdrFpUopCode = "Fa.uw = cSwap(Mem.uw, ((CPSR)Cpsr).e);"
59 microLdrFpUopIop = InstObjParams('ldrfp_uop', 'MicroLdrFpUop',
60 'MicroMemOp',
61 {'memacc_code': microLdrFpUopCode,
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 45 unchanged lines hidden (view full) ---

54 'ea_code': 'EA = Rb + (up ? imm : -imm);',
55 'predicate_test': predicateTest},
56 ['IsMicroop'])
57
58 microLdrFpUopCode = "Fa.uw = cSwap(Mem.uw, ((CPSR)Cpsr).e);"
59 microLdrFpUopIop = InstObjParams('ldrfp_uop', 'MicroLdrFpUop',
60 'MicroMemOp',
61 {'memacc_code': microLdrFpUopCode,
62 'ea_code':
62 'ea_code': vfpEnabledCheckCode +
63 'EA = Rb + (up ? imm : -imm);',
64 'predicate_test': predicateTest},
65 ['IsMicroop'])
66
67 microLdrDBFpUopCode = "Fa.uw = cSwap(Mem.uw, ((CPSR)Cpsr).e);"
68 microLdrDBFpUopIop = InstObjParams('ldrfp_uop', 'MicroLdrDBFpUop',
69 'MicroMemOp',
70 {'memacc_code': microLdrFpUopCode,
63 'EA = Rb + (up ? imm : -imm);',
64 'predicate_test': predicateTest},
65 ['IsMicroop'])
66
67 microLdrDBFpUopCode = "Fa.uw = cSwap(Mem.uw, ((CPSR)Cpsr).e);"
68 microLdrDBFpUopIop = InstObjParams('ldrfp_uop', 'MicroLdrDBFpUop',
69 'MicroMemOp',
70 {'memacc_code': microLdrFpUopCode,
71 'ea_code': '''
71 'ea_code': vfpEnabledCheckCode + '''
72 EA = Rb + (up ? imm : -imm) +
73 (((CPSR)Cpsr).e ? 4 : 0);
74 ''',
75 'predicate_test': predicateTest},
76 ['IsMicroop'])
77
78 microLdrDTFpUopCode = "Fa.uw = cSwap(Mem.uw, ((CPSR)Cpsr).e);"
79 microLdrDTFpUopIop = InstObjParams('ldrfp_uop', 'MicroLdrDTFpUop',
80 'MicroMemOp',
81 {'memacc_code': microLdrFpUopCode,
72 EA = Rb + (up ? imm : -imm) +
73 (((CPSR)Cpsr).e ? 4 : 0);
74 ''',
75 'predicate_test': predicateTest},
76 ['IsMicroop'])
77
78 microLdrDTFpUopCode = "Fa.uw = cSwap(Mem.uw, ((CPSR)Cpsr).e);"
79 microLdrDTFpUopIop = InstObjParams('ldrfp_uop', 'MicroLdrDTFpUop',
80 'MicroMemOp',
81 {'memacc_code': microLdrFpUopCode,
82 'ea_code': '''
82 'ea_code': vfpEnabledCheckCode + '''
83 EA = Rb + (up ? imm : -imm) -
84 (((CPSR)Cpsr).e ? 4 : 0);
85 ''',
86 'predicate_test': predicateTest},
87 ['IsMicroop'])
88
89 microLdrRetUopCode = '''
90 CPSR cpsr = Cpsr;

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112 'predicate_test': predicateTest},
113 ['IsMicroop'])
114
115 microStrFpUopCode = "Mem = cSwap(Fa.uw, ((CPSR)Cpsr).e);"
116 microStrFpUopIop = InstObjParams('strfp_uop', 'MicroStrFpUop',
117 'MicroMemOp',
118 {'memacc_code': microStrFpUopCode,
119 'postacc_code': "",
83 EA = Rb + (up ? imm : -imm) -
84 (((CPSR)Cpsr).e ? 4 : 0);
85 ''',
86 'predicate_test': predicateTest},
87 ['IsMicroop'])
88
89 microLdrRetUopCode = '''
90 CPSR cpsr = Cpsr;

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112 'predicate_test': predicateTest},
113 ['IsMicroop'])
114
115 microStrFpUopCode = "Mem = cSwap(Fa.uw, ((CPSR)Cpsr).e);"
116 microStrFpUopIop = InstObjParams('strfp_uop', 'MicroStrFpUop',
117 'MicroMemOp',
118 {'memacc_code': microStrFpUopCode,
119 'postacc_code': "",
120 'ea_code': 'EA = Rb + (up ? imm : -imm);',
120 'ea_code': vfpEnabledCheckCode +
121 'EA = Rb + (up ? imm : -imm);',
121 'predicate_test': predicateTest},
122 ['IsMicroop'])
123
124 microStrDBFpUopCode = "Mem = cSwap(Fa.uw, ((CPSR)Cpsr).e);"
125 microStrDBFpUopIop = InstObjParams('strfp_uop', 'MicroStrDBFpUop',
126 'MicroMemOp',
127 {'memacc_code': microStrFpUopCode,
128 'postacc_code': "",
122 'predicate_test': predicateTest},
123 ['IsMicroop'])
124
125 microStrDBFpUopCode = "Mem = cSwap(Fa.uw, ((CPSR)Cpsr).e);"
126 microStrDBFpUopIop = InstObjParams('strfp_uop', 'MicroStrDBFpUop',
127 'MicroMemOp',
128 {'memacc_code': microStrFpUopCode,
129 'postacc_code': "",
129 'ea_code': '''
130 'ea_code': vfpEnabledCheckCode + '''
130 EA = Rb + (up ? imm : -imm) +
131 (((CPSR)Cpsr).e ? 4 : 0);
132 ''',
133 'predicate_test': predicateTest},
134 ['IsMicroop'])
135
136 microStrDTFpUopCode = "Mem = cSwap(Fa.uw, ((CPSR)Cpsr).e);"
137 microStrDTFpUopIop = InstObjParams('strfp_uop', 'MicroStrDTFpUop',
138 'MicroMemOp',
139 {'memacc_code': microStrFpUopCode,
140 'postacc_code': "",
131 EA = Rb + (up ? imm : -imm) +
132 (((CPSR)Cpsr).e ? 4 : 0);
133 ''',
134 'predicate_test': predicateTest},
135 ['IsMicroop'])
136
137 microStrDTFpUopCode = "Mem = cSwap(Fa.uw, ((CPSR)Cpsr).e);"
138 microStrDTFpUopIop = InstObjParams('strfp_uop', 'MicroStrDTFpUop',
139 'MicroMemOp',
140 {'memacc_code': microStrFpUopCode,
141 'postacc_code': "",
141 'ea_code': '''
142 'ea_code': vfpEnabledCheckCode + '''
142 EA = Rb + (up ? imm : -imm) -
143 (((CPSR)Cpsr).e ? 4 : 0);
144 ''',
145 'predicate_test': predicateTest},
146 ['IsMicroop'])
147
148 header_output = decoder_output = exec_output = ''
149

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217 storeMemAccCode = regGetCode + convCode
218
219 loadIop = InstObjParams('ldrneon%(size)d_uop' % subst,
220 'MicroLdrNeon%(size)dUop' % subst,
221 'MicroNeonMemOp',
222 { 'mem_decl' : memDecl,
223 'size' : size,
224 'memacc_code' : loadMemAccCode,
143 EA = Rb + (up ? imm : -imm) -
144 (((CPSR)Cpsr).e ? 4 : 0);
145 ''',
146 'predicate_test': predicateTest},
147 ['IsMicroop'])
148
149 header_output = decoder_output = exec_output = ''
150

--- 67 unchanged lines hidden (view full) ---

218 storeMemAccCode = regGetCode + convCode
219
220 loadIop = InstObjParams('ldrneon%(size)d_uop' % subst,
221 'MicroLdrNeon%(size)dUop' % subst,
222 'MicroNeonMemOp',
223 { 'mem_decl' : memDecl,
224 'size' : size,
225 'memacc_code' : loadMemAccCode,
225 'ea_code' : eaCode,
226 'ea_code' : simdEnabledCheckCode + eaCode,
226 'predicate_test' : predicateTest },
227 [ 'IsMicroop', 'IsMemRef', 'IsLoad' ])
228 storeIop = InstObjParams('strneon%(size)d_uop' % subst,
229 'MicroStrNeon%(size)dUop' % subst,
230 'MicroNeonMemOp',
231 { 'mem_decl' : memDecl,
232 'size' : size,
233 'memacc_code' : storeMemAccCode,
227 'predicate_test' : predicateTest },
228 [ 'IsMicroop', 'IsMemRef', 'IsLoad' ])
229 storeIop = InstObjParams('strneon%(size)d_uop' % subst,
230 'MicroStrNeon%(size)dUop' % subst,
231 'MicroNeonMemOp',
232 { 'mem_decl' : memDecl,
233 'size' : size,
234 'memacc_code' : storeMemAccCode,
234 'ea_code' : eaCode,
235 'ea_code' : simdEnabledCheckCode + eaCode,
235 'predicate_test' : predicateTest },
236 [ 'IsMicroop', 'IsMemRef', 'IsStore' ])
237
238 exec_output += NeonLoadExecute.subst(loadIop) + \
239 NeonLoadInitiateAcc.subst(loadIop) + \
240 NeonLoadCompleteAcc.subst(loadIop) + \
241 NeonStoreExecute.subst(storeIop) + \
242 NeonStoreInitiateAcc.subst(storeIop) + \

--- 381 unchanged lines hidden --- 		236 'predicate_test' : predicateTest },
237 [ 'IsMicroop', 'IsMemRef', 'IsStore' ])
238
239 exec_output += NeonLoadExecute.subst(loadIop) + \
240 NeonLoadInitiateAcc.subst(loadIop) + \
241 NeonLoadCompleteAcc.subst(loadIop) + \
242 NeonStoreExecute.subst(storeIop) + \
243 NeonStoreInitiateAcc.subst(storeIop) + \

--- 381 unchanged lines hidden ---