m5ops.isa (8607:5fb918115c07) | m5ops.isa (8659:78f27ef5e919) |
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1// 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 177 unchanged lines hidden (view full) --- 186 "predicate_test": predicateTest }, 187 ["No_OpClass", "IsNonSpeculative"]) 188 header_output += BasicDeclare.subst(loadsymbolIop) 189 decoder_output += BasicConstructor.subst(loadsymbolIop) 190 exec_output += PredOpExecute.subst(loadsymbolIop) 191 192 initparamCode = ''' 193#if FULL_SYSTEM | 1// 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 177 unchanged lines hidden (view full) --- 186 "predicate_test": predicateTest }, 187 ["No_OpClass", "IsNonSpeculative"]) 188 header_output += BasicDeclare.subst(loadsymbolIop) 189 decoder_output += BasicConstructor.subst(loadsymbolIop) 190 exec_output += PredOpExecute.subst(loadsymbolIop) 191 192 initparamCode = ''' 193#if FULL_SYSTEM |
194 Rt = PseudoInst::initParam(xc->tcBase()); | 194 uint64_t ip_val = PseudoInst::initParam(xc->tcBase()); 195 R0 = bits(ip_val, 31, 0); 196 R1 = bits(ip_val, 63, 32); |
195#else 196 PseudoInst::panicFsOnlyPseudoInst("initparam"); | 197#else 198 PseudoInst::panicFsOnlyPseudoInst("initparam"); |
197 Rt = 0; | |
198#endif 199 ''' 200 201 initparamIop = InstObjParams("initparam", "Initparam", "PredOp", 202 { "code": initparamCode, | 199#endif 200 ''' 201 202 initparamIop = InstObjParams("initparam", "Initparam", "PredOp", 203 { "code": initparamCode, |
203 "predicate_test": predicateTest }) | 204 "predicate_test": predicateTest }, 205 ["IsNonSpeculative"]) |
204 header_output += BasicDeclare.subst(initparamIop) 205 decoder_output += BasicConstructor.subst(initparamIop) 206 exec_output += PredOpExecute.subst(initparamIop) 207 208 resetstats_code = ''' 209 PseudoInst::resetstats(xc->tcBase(), join32to64(R1, R0), join32to64(R3, R2)); 210 ''' 211 --- 118 unchanged lines hidden --- | 206 header_output += BasicDeclare.subst(initparamIop) 207 decoder_output += BasicConstructor.subst(initparamIop) 208 exec_output += PredOpExecute.subst(initparamIop) 209 210 resetstats_code = ''' 211 PseudoInst::resetstats(xc->tcBase(), join32to64(R1, R0), join32to64(R3, R2)); 212 ''' 213 --- 118 unchanged lines hidden --- |