m5ops.isa (10037:5cac77888310) | m5ops.isa (10126:943808ead35e) |
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1// 2// Copyright (c) 2010, 2012-2013 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 389 unchanged lines hidden (view full) --- 398 399 m5readfileCode = ''' 400 int n = 4; 401 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false); 402 R0 = PseudoInst::readfile(xc->tcBase(), R0, join32to64(R3,R2), offset); 403 ''' 404 405 m5readfileCode64 = ''' | 1// 2// Copyright (c) 2010, 2012-2013 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 389 unchanged lines hidden (view full) --- 398 399 m5readfileCode = ''' 400 int n = 4; 401 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false); 402 R0 = PseudoInst::readfile(xc->tcBase(), R0, join32to64(R3,R2), offset); 403 ''' 404 405 m5readfileCode64 = ''' |
406 int n = 4; | 406 int n = 2; |
407 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false); | 407 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false); |
408 n = 6; 409 X0 = PseudoInst::readfile(xc->tcBase(), (uint32_t)X0, X1, offset); | 408 n = 3; 409 X0 = PseudoInst::readfile(xc->tcBase(), X0, X1, offset); |
410 ''' 411 412 m5readfileIop = InstObjParams("m5readfile", "M5readfile", "PredOp", 413 { "code": m5readfileCode, 414 "predicate_test": predicateTest }, 415 ["IsNonSpeculative", "IsUnverifiable"]) 416 header_output += BasicDeclare.subst(m5readfileIop) 417 decoder_output += BasicConstructor.subst(m5readfileIop) --- 12 unchanged lines hidden (view full) --- 430 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false); 431 n = 6; 432 Addr filenameAddr = getArgument(xc->tcBase(), n, sizeof(Addr), false); 433 R0 = PseudoInst::writefile(xc->tcBase(), R0, join32to64(R3,R2), offset, 434 filenameAddr); 435 ''' 436 437 m5writefileCode64 = ''' | 410 ''' 411 412 m5readfileIop = InstObjParams("m5readfile", "M5readfile", "PredOp", 413 { "code": m5readfileCode, 414 "predicate_test": predicateTest }, 415 ["IsNonSpeculative", "IsUnverifiable"]) 416 header_output += BasicDeclare.subst(m5readfileIop) 417 decoder_output += BasicConstructor.subst(m5readfileIop) --- 12 unchanged lines hidden (view full) --- 430 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false); 431 n = 6; 432 Addr filenameAddr = getArgument(xc->tcBase(), n, sizeof(Addr), false); 433 R0 = PseudoInst::writefile(xc->tcBase(), R0, join32to64(R3,R2), offset, 434 filenameAddr); 435 ''' 436 437 m5writefileCode64 = ''' |
438 int n = 4; | 438 int n = 2; |
439 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false); | 439 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false); |
440 n = 6; | 440 n = 3; |
441 Addr filenameAddr = getArgument(xc->tcBase(), n, sizeof(Addr), false); | 441 Addr filenameAddr = getArgument(xc->tcBase(), n, sizeof(Addr), false); |
442 X0 = PseudoInst::writefile(xc->tcBase(), (uint32_t)X0, X1, offset, | 442 X0 = PseudoInst::writefile(xc->tcBase(), X0, X1, offset, |
443 filenameAddr); 444 ''' 445 446 m5writefileIop = InstObjParams("m5writefile", "M5writefile", "PredOp", 447 { "code": m5writefileCode, 448 "predicate_test": predicateTest }, 449 ["IsNonSpeculative"]) 450 header_output += BasicDeclare.subst(m5writefileIop) --- 23 unchanged lines hidden (view full) --- 474 header_output += BasicDeclare.subst(m5switchcpuIop) 475 decoder_output += BasicConstructor.subst(m5switchcpuIop) 476 exec_output += PredOpExecute.subst(m5switchcpuIop) 477 478 m5addsymbolCode = ''' 479 PseudoInst::addsymbol(xc->tcBase(), join32to64(R1, R0), R2); 480 ''' 481 m5addsymbolCode64 = ''' | 443 filenameAddr); 444 ''' 445 446 m5writefileIop = InstObjParams("m5writefile", "M5writefile", "PredOp", 447 { "code": m5writefileCode, 448 "predicate_test": predicateTest }, 449 ["IsNonSpeculative"]) 450 header_output += BasicDeclare.subst(m5writefileIop) --- 23 unchanged lines hidden (view full) --- 474 header_output += BasicDeclare.subst(m5switchcpuIop) 475 decoder_output += BasicConstructor.subst(m5switchcpuIop) 476 exec_output += PredOpExecute.subst(m5switchcpuIop) 477 478 m5addsymbolCode = ''' 479 PseudoInst::addsymbol(xc->tcBase(), join32to64(R1, R0), R2); 480 ''' 481 m5addsymbolCode64 = ''' |
482 PseudoInst::addsymbol(xc->tcBase(), X0, (uint32_t)X1); | 482 PseudoInst::addsymbol(xc->tcBase(), X0, X1); |
483 ''' 484 m5addsymbolIop = InstObjParams("m5addsymbol", "M5addsymbol", "PredOp", 485 { "code": m5addsymbolCode, 486 "predicate_test": predicateTest }, 487 ["IsNonSpeculative"]) 488 header_output += BasicDeclare.subst(m5addsymbolIop) 489 decoder_output += BasicConstructor.subst(m5addsymbolIop) 490 exec_output += PredOpExecute.subst(m5addsymbolIop) --- 76 unchanged lines hidden --- | 483 ''' 484 m5addsymbolIop = InstObjParams("m5addsymbol", "M5addsymbol", "PredOp", 485 { "code": m5addsymbolCode, 486 "predicate_test": predicateTest }, 487 ["IsNonSpeculative"]) 488 header_output += BasicDeclare.subst(m5addsymbolIop) 489 decoder_output += BasicConstructor.subst(m5addsymbolIop) 490 exec_output += PredOpExecute.subst(m5addsymbolIop) --- 76 unchanged lines hidden --- |