1// 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 25 unchanged lines hidden (view full) --- 34// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36// 37// Authors: Gene Wu 38 39 40let {{ 41 header_output = "" |
42 decoder_output = ''' 43 uint64_t join32to64(uint32_t r1, uint32_t r0) 44 { 45 uint64_t r = r1; 46 r <<= 32; 47 r |= r0; 48 return r; 49 } 50 ''' 51 exec_output = ''' 52 uint64_t join32to64(uint32_t r1, uint32_t r0); 53 ''' |
54 |
55 |
56 armCode = ''' 57#if FULL_SYSTEM 58 PseudoInst::arm(xc->tcBase()); 59#endif 60 ''' 61 armIop = InstObjParams("arm", "Arm", "PredOp", 62 { "code": armCode, 63 "predicate_test": predicateTest }, 64 ["IsNonSpeculative"]) 65 header_output += BasicDeclare.subst(armIop) 66 decoder_output += BasicConstructor.subst(armIop) 67 exec_output += PredOpExecute.subst(armIop) 68 69 quiesceCode = ''' 70#if FULL_SYSTEM |
71 PseudoInst::quiesce(xc->tcBase()); |
72#endif 73 ''' 74 quiesceIop = InstObjParams("quiesce", "Quiesce", "PredOp", 75 { "code": quiesceCode, 76 "predicate_test": predicateTest }, 77 ["IsNonSpeculative", "IsQuiesce"]) 78 header_output += BasicDeclare.subst(quiesceIop) 79 decoder_output += BasicConstructor.subst(quiesceIop) 80 exec_output += QuiescePredOpExecute.subst(quiesceIop) 81 82 quiesceNsCode = ''' 83#if FULL_SYSTEM |
84 PseudoInst::quiesceNs(xc->tcBase(), join32to64(R1, R0)); |
85#endif 86 ''' 87 88 quiesceNsIop = InstObjParams("quiesceNs", "QuiesceNs", "PredOp", 89 { "code": quiesceNsCode, 90 "predicate_test": predicateTest }, 91 ["IsNonSpeculative", "IsQuiesce"]) 92 header_output += BasicDeclare.subst(quiesceNsIop) 93 decoder_output += BasicConstructor.subst(quiesceNsIop) 94 exec_output += QuiescePredOpExecute.subst(quiesceNsIop) 95 96 quiesceCyclesCode = ''' 97#if FULL_SYSTEM |
98 PseudoInst::quiesceCycles(xc->tcBase(), join32to64(R1, R0)); |
99#endif 100 ''' 101 102 quiesceCyclesIop = InstObjParams("quiesceCycles", "QuiesceCycles", "PredOp", 103 { "code": quiesceCyclesCode, 104 "predicate_test": predicateTest }, 105 ["IsNonSpeculative", "IsQuiesce", "IsUnverifiable"]) 106 header_output += BasicDeclare.subst(quiesceCyclesIop) 107 decoder_output += BasicConstructor.subst(quiesceCyclesIop) 108 exec_output += QuiescePredOpExecute.subst(quiesceCyclesIop) 109 110 quiesceTimeCode = ''' 111#if FULL_SYSTEM |
112 uint64_t qt_val = PseudoInst::quiesceTime(xc->tcBase()); 113 R0 = bits(qt_val, 31, 0); 114 R1 = bits(qt_val, 63, 32); |
115#endif 116 ''' 117 118 quiesceTimeIop = InstObjParams("quiesceTime", "QuiesceTime", "PredOp", 119 { "code": quiesceTimeCode, 120 "predicate_test": predicateTest }, 121 ["IsNonSpeculative", "IsUnverifiable"]) 122 header_output += BasicDeclare.subst(quiesceTimeIop) 123 decoder_output += BasicConstructor.subst(quiesceTimeIop) 124 exec_output += PredOpExecute.subst(quiesceTimeIop) 125 |
126 rpnsCode = ''' 127 uint64_t rpns_val = PseudoInst::rpns(xc->tcBase()); 128 R0 = bits(rpns_val, 31, 0); 129 R1 = bits(rpns_val, 63, 32); 130 ''' 131 |
132 rpnsIop = InstObjParams("rpns", "Rpns", "PredOp", |
133 { "code": rpnsCode, |
134 "predicate_test": predicateTest }, 135 ["IsNonSpeculative", "IsUnverifiable"]) 136 header_output += BasicDeclare.subst(rpnsIop) 137 decoder_output += BasicConstructor.subst(rpnsIop) 138 exec_output += PredOpExecute.subst(rpnsIop) 139 |
140 wakeCpuCode = ''' 141 PseudoInst::wakeCPU(xc->tcBase(), join32to64(R1,R0)); 142 ''' 143 |
144 wakeCPUIop = InstObjParams("wakeCPU", "WakeCPU", "PredOp", |
145 { "code": wakeCpuCode, 146 "predicate_test": predicateTest }, 147 ["IsNonSpeculative", "IsUnverifiable"]) |
148 header_output += BasicDeclare.subst(wakeCPUIop) 149 decoder_output += BasicConstructor.subst(wakeCPUIop) 150 exec_output += PredOpExecute.subst(wakeCPUIop) 151 152 deprecated_ivlbIop = InstObjParams("deprecated_ivlb", "Deprecated_ivlb", "PredOp", 153 { "code": '''warn_once("Obsolete M5 ivlb instruction encountered.\\n");''', 154 "predicate_test": predicateTest }) 155 header_output += BasicDeclare.subst(deprecated_ivlbIop) --- 15 unchanged lines hidden (view full) --- 171 deprecated_exitIop = InstObjParams("deprecated_exit", "Deprecated_exit", "PredOp", 172 { "code": deprecated_exit_code, 173 "predicate_test": predicateTest }, 174 ["No_OpClass", "IsNonSpeculative"]) 175 header_output += BasicDeclare.subst(deprecated_exitIop) 176 decoder_output += BasicConstructor.subst(deprecated_exitIop) 177 exec_output += PredOpExecute.subst(deprecated_exitIop) 178 |
179 m5exit_code = ''' 180 PseudoInst::m5exit(xc->tcBase(), join32to64(R1, R0)); 181 ''' |
182 m5exitIop = InstObjParams("m5exit", "M5exit", "PredOp", |
183 { "code": m5exit_code, 184 "predicate_test": predicateTest }, 185 ["No_OpClass", "IsNonSpeculative"]) |
186 header_output += BasicDeclare.subst(m5exitIop) 187 decoder_output += BasicConstructor.subst(m5exitIop) 188 exec_output += PredOpExecute.subst(m5exitIop) 189 190 loadsymbolCode = ''' 191#if FULL_SYSTEM 192 PseudoInst::loadsymbol(xc->tcBase()); 193#endif --- 15 unchanged lines hidden (view full) --- 209 210 initparamIop = InstObjParams("initparam", "Initparam", "PredOp", 211 { "code": initparamCode, 212 "predicate_test": predicateTest }) 213 header_output += BasicDeclare.subst(initparamIop) 214 decoder_output += BasicConstructor.subst(initparamIop) 215 exec_output += PredOpExecute.subst(initparamIop) 216 |
217 resetstats_code = ''' 218 PseudoInst::resetstats(xc->tcBase(), join32to64(R1, R0), join32to64(R3, R2)); 219 ''' 220 |
221 resetstatsIop = InstObjParams("resetstats", "Resetstats", "PredOp", |
222 { "code": resetstats_code, |
223 "predicate_test": predicateTest }, 224 ["IsNonSpeculative"]) 225 header_output += BasicDeclare.subst(resetstatsIop) 226 decoder_output += BasicConstructor.subst(resetstatsIop) 227 exec_output += PredOpExecute.subst(resetstatsIop) 228 |
229 dumpstats_code = ''' 230 PseudoInst::dumpstats(xc->tcBase(), join32to64(R1, R0), join32to64(R3, R2)); 231 ''' |
232 dumpstatsIop = InstObjParams("dumpstats", "Dumpstats", "PredOp", |
233 { "code": dumpstats_code, |
234 "predicate_test": predicateTest }, 235 ["IsNonSpeculative"]) 236 header_output += BasicDeclare.subst(dumpstatsIop) 237 decoder_output += BasicConstructor.subst(dumpstatsIop) 238 exec_output += PredOpExecute.subst(dumpstatsIop) 239 |
240 dumpresetstats_code = ''' 241 PseudoInst::dumpresetstats(xc->tcBase(), join32to64(R1, R0), join32to64(R3, R2)); 242 ''' |
243 dumpresetstatsIop = InstObjParams("dumpresetstats", "Dumpresetstats", "PredOp", |
244 { "code": dumpresetstats_code, |
245 "predicate_test": predicateTest }, 246 ["IsNonSpeculative"]) 247 header_output += BasicDeclare.subst(dumpresetstatsIop) 248 decoder_output += BasicConstructor.subst(dumpresetstatsIop) 249 exec_output += PredOpExecute.subst(dumpresetstatsIop) 250 |
251 m5checkpoint_code = ''' 252 PseudoInst::m5checkpoint(xc->tcBase(), join32to64(R1, R0), join32to64(R3, R2)); 253 ''' |
254 m5checkpointIop = InstObjParams("m5checkpoint", "M5checkpoint", "PredOp", |
255 { "code": m5checkpoint_code, |
256 "predicate_test": predicateTest }, 257 ["IsNonSpeculative"]) 258 header_output += BasicDeclare.subst(m5checkpointIop) 259 decoder_output += BasicConstructor.subst(m5checkpointIop) 260 exec_output += PredOpExecute.subst(m5checkpointIop) 261 262 m5readfileCode = ''' 263#if FULL_SYSTEM |
264 int n = 4; 265 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false); 266 R0 = PseudoInst::readfile(xc->tcBase(), R0, join32to64(R3,R2), offset); |
267#endif 268 ''' 269 m5readfileIop = InstObjParams("m5readfile", "M5readfile", "PredOp", 270 { "code": m5readfileCode, 271 "predicate_test": predicateTest }, 272 ["IsNonSpeculative"]) 273 header_output += BasicDeclare.subst(m5readfileIop) 274 decoder_output += BasicConstructor.subst(m5readfileIop) --- 12 unchanged lines hidden (view full) --- 287 "predicate_test": predicateTest }, 288 ["IsNonSpeculative"]) 289 header_output += BasicDeclare.subst(m5switchcpuIop) 290 decoder_output += BasicConstructor.subst(m5switchcpuIop) 291 exec_output += PredOpExecute.subst(m5switchcpuIop) 292 293 m5addsymbolCode = ''' 294#if FULL_SYSTEM |
295 PseudoInst::addsymbol(xc->tcBase(), join32to64(R1, R0), R2); |
296#endif 297 ''' 298 m5addsymbolIop = InstObjParams("m5addsymbol", "M5addsymbol", "PredOp", 299 { "code": m5addsymbolCode, 300 "predicate_test": predicateTest }, 301 ["IsNonSpeculative"]) 302 header_output += BasicDeclare.subst(m5addsymbolIop) 303 decoder_output += BasicConstructor.subst(m5addsymbolIop) --- 13 unchanged lines hidden --- |