m5ops.isa (7732:a2c660de7787) | m5ops.isa (8142:e08035e1a1f6) |
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1// 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 52 unchanged lines hidden (view full) --- 61#endif 62 ''' 63 quiesceIop = InstObjParams("quiesce", "Quiesce", "PredOp", 64 { "code": quiesceCode, 65 "predicate_test": predicateTest }, 66 ["IsNonSpeculative", "IsQuiesce"]) 67 header_output += BasicDeclare.subst(quiesceIop) 68 decoder_output += BasicConstructor.subst(quiesceIop) | 1// 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 52 unchanged lines hidden (view full) --- 61#endif 62 ''' 63 quiesceIop = InstObjParams("quiesce", "Quiesce", "PredOp", 64 { "code": quiesceCode, 65 "predicate_test": predicateTest }, 66 ["IsNonSpeculative", "IsQuiesce"]) 67 header_output += BasicDeclare.subst(quiesceIop) 68 decoder_output += BasicConstructor.subst(quiesceIop) |
69 exec_output += PredOpExecute.subst(quiesceIop) | 69 exec_output += QuiescePredOpExecute.subst(quiesceIop) |
70 71 quiesceNsCode = ''' 72#if FULL_SYSTEM 73 PseudoInst::quiesceNs(xc->tcBase(), R0); 74#endif 75 ''' 76 77 quiesceNsIop = InstObjParams("quiesceNs", "QuiesceNs", "PredOp", 78 { "code": quiesceNsCode, 79 "predicate_test": predicateTest }, 80 ["IsNonSpeculative", "IsQuiesce"]) 81 header_output += BasicDeclare.subst(quiesceNsIop) 82 decoder_output += BasicConstructor.subst(quiesceNsIop) | 70 71 quiesceNsCode = ''' 72#if FULL_SYSTEM 73 PseudoInst::quiesceNs(xc->tcBase(), R0); 74#endif 75 ''' 76 77 quiesceNsIop = InstObjParams("quiesceNs", "QuiesceNs", "PredOp", 78 { "code": quiesceNsCode, 79 "predicate_test": predicateTest }, 80 ["IsNonSpeculative", "IsQuiesce"]) 81 header_output += BasicDeclare.subst(quiesceNsIop) 82 decoder_output += BasicConstructor.subst(quiesceNsIop) |
83 exec_output += PredOpExecute.subst(quiesceNsIop) | 83 exec_output += QuiescePredOpExecute.subst(quiesceNsIop) |
84 85 quiesceCyclesCode = ''' 86#if FULL_SYSTEM 87 PseudoInst::quiesceCycles(xc->tcBase(), R0); 88#endif 89 ''' 90 91 quiesceCyclesIop = InstObjParams("quiesceCycles", "QuiesceCycles", "PredOp", 92 { "code": quiesceCyclesCode, 93 "predicate_test": predicateTest }, 94 ["IsNonSpeculative", "IsQuiesce", "IsUnverifiable"]) 95 header_output += BasicDeclare.subst(quiesceCyclesIop) 96 decoder_output += BasicConstructor.subst(quiesceCyclesIop) | 84 85 quiesceCyclesCode = ''' 86#if FULL_SYSTEM 87 PseudoInst::quiesceCycles(xc->tcBase(), R0); 88#endif 89 ''' 90 91 quiesceCyclesIop = InstObjParams("quiesceCycles", "QuiesceCycles", "PredOp", 92 { "code": quiesceCyclesCode, 93 "predicate_test": predicateTest }, 94 ["IsNonSpeculative", "IsQuiesce", "IsUnverifiable"]) 95 header_output += BasicDeclare.subst(quiesceCyclesIop) 96 decoder_output += BasicConstructor.subst(quiesceCyclesIop) |
97 exec_output += PredOpExecute.subst(quiesceCyclesIop) | 97 exec_output += QuiescePredOpExecute.subst(quiesceCyclesIop) |
98 99 quiesceTimeCode = ''' 100#if FULL_SYSTEM 101 R0 = PseudoInst::quiesceTime(xc->tcBase()); 102#endif 103 ''' 104 105 quiesceTimeIop = InstObjParams("quiesceTime", "QuiesceTime", "PredOp", --- 170 unchanged lines hidden --- | 98 99 quiesceTimeCode = ''' 100#if FULL_SYSTEM 101 R0 = PseudoInst::quiesceTime(xc->tcBase()); 102#endif 103 ''' 104 105 quiesceTimeIop = InstObjParams("quiesceTime", "QuiesceTime", "PredOp", --- 170 unchanged lines hidden --- |