data64.isa (14127:65faf17eea53) data64.isa (14128:6ed23d07d0d1)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2011-2013, 2016-2019 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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507 decoder_output += DCStore64Constructor.subst(msrDCIVACIop);
508 exec_output += DCStore64Execute.subst(msrDCIVACIop);
509 exec_output += DCStore64InitiateAcc.subst(msrDCIVACIop);
510 exec_output += Store64CompleteAcc.subst(msrDCIVACIop);
511
512 def buildMsrImmInst(mnem, inst_name, code):
513 global header_output, decoder_output, exec_output
514 msrImmPermission = '''
1// -*- mode:c++ -*-
2
3// Copyright (c) 2011-2013, 2016-2019 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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507 decoder_output += DCStore64Constructor.subst(msrDCIVACIop);
508 exec_output += DCStore64Execute.subst(msrDCIVACIop);
509 exec_output += DCStore64InitiateAcc.subst(msrDCIVACIop);
510 exec_output += Store64CompleteAcc.subst(msrDCIVACIop);
511
512 def buildMsrImmInst(mnem, inst_name, code):
513 global header_output, decoder_output, exec_output
514 msrImmPermission = '''
515 if (!canWriteAArch64SysReg(
516 (MiscRegIndex) xc->tcBase()->flattenRegId(
517 RegId(MiscRegClass, dest)).index(),
518 Scr64, Cpsr, xc->tcBase())) {
519 return std::make_shared(
520 machInst, 0, EC_TRAPPED_MSR_MRS_64,
521 mnemonic);
515 auto misc_index = (MiscRegIndex) xc->tcBase()->flattenRegId(
516 RegId(MiscRegClass, dest)).index();
517
518 if (!miscRegInfo[misc_index][MISCREG_IMPLEMENTED]) {
519 return std::make_shared<UndefinedInstruction>(
520 machInst, false,
521 mnemonic);
522 }
523
522 }
523
524 if (!canWriteAArch64SysReg(misc_index,
525 Scr64, Cpsr, xc->tcBase())) {
526
527 return std::make_shared<UndefinedInstruction>(
528 machInst, 0, EC_TRAPPED_MSR_MRS_64,
529 mnemonic);
530 }
531
524 '''
525 msrIop = InstObjParams("msr", inst_name, "MiscRegImmOp64",
526 msrImmPermission + code,
527 ["IsSerializeAfter", "IsNonSpeculative"])
528 header_output += MiscRegOp64Declare.subst(msrIop)
529 decoder_output += MiscRegOp64Constructor.subst(msrIop)
530 exec_output += BasicExecute.subst(msrIop)
531

--- 67 unchanged lines hidden --- 		532 '''
533 msrIop = InstObjParams("msr", inst_name, "MiscRegImmOp64",
534 msrImmPermission + code,
535 ["IsSerializeAfter", "IsNonSpeculative"])
536 header_output += MiscRegOp64Declare.subst(msrIop)
537 decoder_output += MiscRegOp64Constructor.subst(msrIop)
538 exec_output += BasicExecute.subst(msrIop)
539

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