pred.isa (6741:73d89772f409) | pred.isa (7110:7d27bd3e7ffb) |
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1// -*- mode:c++ -*- 2 | 1// -*- mode:c++ -*- 2 |
3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating 9// to a hardware implementation of the functionality of the software 10// licensed hereunder. You may use the software subject to the license 11// terms below provided that you ensure that this notice is replicated 12// unmodified and in its entirety in all distributions of the software, 13// modified or unmodified, in source code or in binary form. 14// |
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3// Copyright (c) 2007-2008 The Florida State University 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright 9// notice, this list of conditions and the following disclaimer; 10// redistributions in binary form must reproduce the above copyright --- 149 unchanged lines hidden (view full) --- 160 icValue = 'findCarry(32, resTemp, Rn, rotated_imm)' 161 ivValue = 'findOverflow(32, resTemp, Rn, rotated_imm)' 162 elif flagtype == "sub": 163 icValue = 'findCarry(32, resTemp, Rn, ~rotated_imm)' 164 ivValue = 'findOverflow(32, resTemp, Rn, ~rotated_imm)' 165 elif flagtype == "rsb": 166 icValue = 'findCarry(32, resTemp, rotated_imm, ~Rn)' 167 ivValue = 'findOverflow(32, resTemp, rotated_imm, ~Rn)' | 15// Copyright (c) 2007-2008 The Florida State University 16// All rights reserved. 17// 18// Redistribution and use in source and binary forms, with or without 19// modification, are permitted provided that the following conditions are 20// met: redistributions of source code must retain the above copyright 21// notice, this list of conditions and the following disclaimer; 22// redistributions in binary form must reproduce the above copyright --- 149 unchanged lines hidden (view full) --- 172 icValue = 'findCarry(32, resTemp, Rn, rotated_imm)' 173 ivValue = 'findOverflow(32, resTemp, Rn, rotated_imm)' 174 elif flagtype == "sub": 175 icValue = 'findCarry(32, resTemp, Rn, ~rotated_imm)' 176 ivValue = 'findOverflow(32, resTemp, Rn, ~rotated_imm)' 177 elif flagtype == "rsb": 178 icValue = 'findCarry(32, resTemp, rotated_imm, ~Rn)' 179 ivValue = 'findOverflow(32, resTemp, rotated_imm, ~Rn)' |
180 elif flagtype == "modImm": 181 icValue = 'rotated_carry' 182 ivValue = 'CondCodes<28:>' |
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168 else: 169 icValue = '(rotate ? rotated_carry:CondCodes<29:>)' 170 ivValue = 'CondCodes<28:>' 171 return calcCcCode % vars() 172}}; 173 174def format DataOp(code, flagtype = logic) {{ 175 (regCcCode, immCcCode) = getCcCode(flagtype) --- 42 unchanged lines hidden (view full) --- 218 BasicDeclare.subst(ccIop) 219 decoder_output = BasicConstructor.subst(iop) + \ 220 BasicConstructor.subst(ccIop) 221 exec_output = PredOpExecute.subst(iop) + \ 222 PredOpExecute.subst(ccIop) 223 decode_block = DataImmDecode.subst(iop) 224}}; 225 | 183 else: 184 icValue = '(rotate ? rotated_carry:CondCodes<29:>)' 185 ivValue = 'CondCodes<28:>' 186 return calcCcCode % vars() 187}}; 188 189def format DataOp(code, flagtype = logic) {{ 190 (regCcCode, immCcCode) = getCcCode(flagtype) --- 42 unchanged lines hidden (view full) --- 233 BasicDeclare.subst(ccIop) 234 decoder_output = BasicConstructor.subst(iop) + \ 235 BasicConstructor.subst(ccIop) 236 exec_output = PredOpExecute.subst(iop) + \ 237 PredOpExecute.subst(ccIop) 238 decode_block = DataImmDecode.subst(iop) 239}}; 240 |
241def format DataModImmOp(code, flagtype = modImm) {{ 242 code += "resTemp = resTemp;" 243 iop = InstObjParams(name, Name + "ModImm", 'PredModImmOp', 244 {"code": code, 245 "predicate_test": predicateTest}) 246 ccIop = InstObjParams(name, Name + "ModImmCc", 'PredModImmOp', 247 {"code": code + getImmCcCode(flagtype), 248 "predicate_test": predicateTest}) 249 header_output = BasicDeclare.subst(iop) + \ 250 BasicDeclare.subst(ccIop) 251 decoder_output = BasicConstructor.subst(iop) + \ 252 BasicConstructor.subst(ccIop) 253 exec_output = PredOpExecute.subst(iop) + \ 254 PredOpExecute.subst(ccIop) 255 decode_block = DataImmDecode.subst(iop) 256}}; 257 |
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226def format PredOp(code, *opt_flags) {{ 227 iop = InstObjParams(name, Name, 'PredOp', 228 {"code": code, 229 "predicate_test": predicateTest}, 230 opt_flags) 231 header_output = BasicDeclare.subst(iop) 232 decoder_output = BasicConstructor.subst(iop) 233 decode_block = BasicDecode.subst(iop) --- 55 unchanged lines hidden --- | 258def format PredOp(code, *opt_flags) {{ 259 iop = InstObjParams(name, Name, 'PredOp', 260 {"code": code, 261 "predicate_test": predicateTest}, 262 opt_flags) 263 header_output = BasicDeclare.subst(iop) 264 decoder_output = BasicConstructor.subst(iop) 265 decode_block = BasicDecode.subst(iop) --- 55 unchanged lines hidden --- |