pred.isa (6423:727622fa50e5) | pred.isa (6724:70129fdded75) |
---|---|
1// -*- mode:c++ -*- 2 3// Copyright (c) 2007-2008 The Florida State University 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 20 unchanged lines hidden (view full) --- 29// Authors: Stephen Hines 30 31//////////////////////////////////////////////////////////////////// 32// 33// Predicated Instruction Execution 34// 35 36let {{ | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2007-2008 The Florida State University 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 20 unchanged lines hidden (view full) --- 29// Authors: Stephen Hines 30 31//////////////////////////////////////////////////////////////////// 32// 33// Predicated Instruction Execution 34// 35 36let {{ |
37 predicateTest = 'testPredicate(Cpsr, condCode)' | 37 predicateTest = 'testPredicate(CondCodes, condCode)' |
38}}; 39 40def template PredOpExecute {{ 41 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 42 { 43 Fault fault = NoFault; 44 uint64_t resTemp = 0; 45 resTemp = resTemp; --- 39 unchanged lines hidden (view full) --- 85 calcCcCode = ''' 86 uint16_t _ic, _iv, _iz, _in; 87 88 _in = (resTemp >> 31) & 1; 89 _iz = (resTemp == 0); 90 _iv = %(ivValue)s & 1; 91 _ic = %(icValue)s & 1; 92 | 38}}; 39 40def template PredOpExecute {{ 41 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 42 { 43 Fault fault = NoFault; 44 uint64_t resTemp = 0; 45 resTemp = resTemp; --- 39 unchanged lines hidden (view full) --- 85 calcCcCode = ''' 86 uint16_t _ic, _iv, _iz, _in; 87 88 _in = (resTemp >> 31) & 1; 89 _iz = (resTemp == 0); 90 _iv = %(ivValue)s & 1; 91 _ic = %(icValue)s & 1; 92 |
93 Cpsr = _in << 31 | _iz << 30 | _ic << 29 | _iv << 28 | 94 (Cpsr & 0x0FFFFFFF); | 93 CondCodes = _in << 31 | _iz << 30 | _ic << 29 | _iv << 28 | 94 (CondCodes & 0x0FFFFFFF); |
95 96 DPRINTF(Arm, "in = %%d\\n", _in); 97 DPRINTF(Arm, "iz = %%d\\n", _iz); 98 DPRINTF(Arm, "ic = %%d\\n", _ic); 99 DPRINTF(Arm, "iv = %%d\\n", _iv); 100 ''' 101 102}}; 103 104let {{ 105 def getCcCode(flagtype): 106 icReg = icImm = iv = '' 107 if flagtype == "none": | 95 96 DPRINTF(Arm, "in = %%d\\n", _in); 97 DPRINTF(Arm, "iz = %%d\\n", _iz); 98 DPRINTF(Arm, "ic = %%d\\n", _ic); 99 DPRINTF(Arm, "iv = %%d\\n", _iv); 100 ''' 101 102}}; 103 104let {{ 105 def getCcCode(flagtype): 106 icReg = icImm = iv = '' 107 if flagtype == "none": |
108 icReg = icImm = 'Cpsr<29:>' 109 iv = 'Cpsr<28:>' | 108 icReg = icImm = 'CondCodes<29:>' 109 iv = 'CondCodes<28:>' |
110 elif flagtype == "add": 111 icReg = icImm = 'findCarry(32, resTemp, Rn, op2)' 112 iv = 'findOverflow(32, resTemp, Rn, op2)' 113 elif flagtype == "sub": 114 icReg = icImm ='findCarry(32, resTemp, Rn, ~op2)' 115 iv = 'findOverflow(32, resTemp, Rn, ~op2)' 116 elif flagtype == "rsb": 117 icReg = icImm = 'findCarry(32, resTemp, op2, ~Rn)' 118 iv = 'findOverflow(32, resTemp, op2, ~Rn)' 119 else: | 110 elif flagtype == "add": 111 icReg = icImm = 'findCarry(32, resTemp, Rn, op2)' 112 iv = 'findOverflow(32, resTemp, Rn, op2)' 113 elif flagtype == "sub": 114 icReg = icImm ='findCarry(32, resTemp, Rn, ~op2)' 115 iv = 'findOverflow(32, resTemp, Rn, ~op2)' 116 elif flagtype == "rsb": 117 icReg = icImm = 'findCarry(32, resTemp, op2, ~Rn)' 118 iv = 'findOverflow(32, resTemp, op2, ~Rn)' 119 else: |
120 icReg = 'shift_carry_rs(Rm, Rs, shift, Cpsr<29:>)' 121 icImm = 'shift_carry_imm(Rm, shift_size, shift, Cpsr<29:>)' 122 iv = 'Cpsr<28:>' | 120 icReg = 'shift_carry_rs(Rm, Rs, shift, CondCodes<29:>)' 121 icImm = 'shift_carry_imm(Rm, shift_size, shift, CondCodes<29:>)' 122 iv = 'CondCodes<28:>' |
123 return (calcCcCode % {"icValue" : icReg, "ivValue" : iv}, 124 calcCcCode % {"icValue" : icImm, "ivValue" : iv}) 125 126 def getImmCcCode(flagtype): 127 ivValue = icValue = '' 128 if flagtype == "none": | 123 return (calcCcCode % {"icValue" : icReg, "ivValue" : iv}, 124 calcCcCode % {"icValue" : icImm, "ivValue" : iv}) 125 126 def getImmCcCode(flagtype): 127 ivValue = icValue = '' 128 if flagtype == "none": |
129 icValue = 'Cpsr<29:>' 130 ivValue = 'Cpsr<28:>' | 129 icValue = 'CondCodes<29:>' 130 ivValue = 'CondCodes<28:>' |
131 elif flagtype == "add": 132 icValue = 'findCarry(32, resTemp, Rn, rotated_imm)' 133 ivValue = 'findOverflow(32, resTemp, Rn, rotated_imm)' 134 elif flagtype == "sub": 135 icValue = 'findCarry(32, resTemp, Rn, ~rotated_imm)' 136 ivValue = 'findOverflow(32, resTemp, Rn, ~rotated_imm)' 137 elif flagtype == "rsb": 138 icValue = 'findCarry(32, resTemp, rotated_imm, ~Rn)' 139 ivValue = 'findOverflow(32, resTemp, rotated_imm, ~Rn)' 140 else: | 131 elif flagtype == "add": 132 icValue = 'findCarry(32, resTemp, Rn, rotated_imm)' 133 ivValue = 'findOverflow(32, resTemp, Rn, rotated_imm)' 134 elif flagtype == "sub": 135 icValue = 'findCarry(32, resTemp, Rn, ~rotated_imm)' 136 ivValue = 'findOverflow(32, resTemp, Rn, ~rotated_imm)' 137 elif flagtype == "rsb": 138 icValue = 'findCarry(32, resTemp, rotated_imm, ~Rn)' 139 ivValue = 'findOverflow(32, resTemp, rotated_imm, ~Rn)' 140 else: |
141 icValue = '(rotate ? rotated_carry:Cpsr<29:>)' 142 ivValue = 'Cpsr<28:>' | 141 icValue = '(rotate ? rotated_carry:CondCodes<29:>)' 142 ivValue = 'CondCodes<28:>' |
143 return calcCcCode % vars() 144}}; 145 146def format DataOp(code, flagtype = logic) {{ 147 (regCcCode, immCcCode) = getCcCode(flagtype) 148 regCode = '''uint32_t op2 = shift_rm_rs(Rm, Rs, | 143 return calcCcCode % vars() 144}}; 145 146def format DataOp(code, flagtype = logic) {{ 147 (regCcCode, immCcCode) = getCcCode(flagtype) 148 regCode = '''uint32_t op2 = shift_rm_rs(Rm, Rs, |
149 shift, Cpsr<29:0>); | 149 shift, CondCodes<29:0>); |
150 op2 = op2;''' + code 151 immCode = '''uint32_t op2 = shift_rm_imm(Rm, shift_size, | 150 op2 = op2;''' + code 151 immCode = '''uint32_t op2 = shift_rm_imm(Rm, shift_size, |
152 shift, Cpsr<29:0>); | 152 shift, CondCodes<29:0>); |
153 op2 = op2;''' + code 154 regIop = InstObjParams(name, Name, 'PredIntOp', 155 {"code": regCode, 156 "predicate_test": predicateTest}) 157 immIop = InstObjParams(name, Name + "Imm", 'PredIntOp', 158 {"code": immCode, 159 "predicate_test": predicateTest}) 160 regCcIop = InstObjParams(name, Name + "Cc", 'PredIntOp', --- 100 unchanged lines hidden --- | 153 op2 = op2;''' + code 154 regIop = InstObjParams(name, Name, 'PredIntOp', 155 {"code": regCode, 156 "predicate_test": predicateTest}) 157 immIop = InstObjParams(name, Name + "Imm", 'PredIntOp', 158 {"code": immCode, 159 "predicate_test": predicateTest}) 160 regCcIop = InstObjParams(name, Name + "Cc", 'PredIntOp', --- 100 unchanged lines hidden --- |