36,163d35
< output header {{
< #include <iostream>
<
< inline uint32_t
< rotate_imm(uint32_t immValue, int rotateValue)
< {
< return ((immValue >> (rotateValue & 31)) |
< (immValue << (32 - (rotateValue & 31))));
< }
<
< /**
< * Base class for predicated integer operations.
< */
< class PredOp : public ArmStaticInst
< {
< protected:
<
< ArmISA::ConditionCode condCode;
<
< /// Constructor
< PredOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
< ArmStaticInst(mnem, _machInst, __opClass),
< condCode((ArmISA::ConditionCode)(unsigned)COND_CODE)
< {
< }
<
< std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
< };
<
< /**
< * Base class for predicated immediate operations.
< */
< class PredImmOp : public PredOp
< {
< protected:
<
< uint32_t imm;
< uint32_t rotate;
< uint32_t rotated_imm;
< uint32_t rotated_carry;
<
< /// Constructor
< PredImmOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
< PredOp(mnem, _machInst, __opClass),
< imm(IMM), rotate(ROTATE << 1), rotated_imm(0),
< rotated_carry(0)
< {
< rotated_imm = rotate_imm(imm, rotate);
< if (rotate != 0)
< rotated_carry = (rotated_imm >> 31) & 1;
< }
<
< std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
< };
<
< /**
< * Base class for predicated integer operations.
< */
< class PredIntOp : public PredOp
< {
< protected:
<
< uint32_t shift_size;
< uint32_t shift;
<
< /// Constructor
< PredIntOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
< PredOp(mnem, _machInst, __opClass),
< shift_size(SHIFT_SIZE), shift(SHIFT)
< {
< }
<
< std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
< };
<
< /**
< * Base class for predicated macro-operations.
< */
< class PredMacroOp : public PredOp
< {
< protected:
<
< uint32_t numMicroops;
< StaticInstPtr * microOps;
<
< /// Constructor
< PredMacroOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
< PredOp(mnem, _machInst, __opClass),
< numMicroops(0)
< {
< // We rely on the subclasses of this object to handle the
< // initialization of the micro-operations, since they are
< // all of variable length
< flags[IsMacroop] = true;
< }
<
< ~PredMacroOp()
< {
< if (numMicroops)
< delete [] microOps;
< }
<
< StaticInstPtr fetchMicroop(MicroPC microPC)
< {
< assert(microPC < numMicroops);
< return microOps[microPC];
< }
<
< %(BasicExecPanic)s
<
< std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
< };
<
< /**
< * Base class for predicated micro-operations.
< */
< class PredMicroop : public PredOp
< {
< /// Constructor
< PredMicroop(const char *mnem, MachInst _machInst, OpClass __opClass) :
< PredOp(mnem, _machInst, __opClass)
< {
< flags[IsMicroop] = true;
< }
< };
<
< }};
<
188,260d59
< //Outputs to decoder.cc
< output decoder {{
< std::string PredOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
< {
< std::stringstream ss;
<
< ccprintf(ss, "%-10s ", mnemonic);
<
< if (_numDestRegs > 0) {
< printReg(ss, _destRegIdx[0]);
< }
<
< ss << ", ";
<
< if (_numSrcRegs > 0) {
< printReg(ss, _srcRegIdx[0]);
< ss << ", ";
< }
<
< return ss.str();
< }
<
< std::string PredImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
< {
< std::stringstream ss;
<
< ccprintf(ss, "%-10s ", mnemonic);
<
< if (_numDestRegs > 0) {
< printReg(ss, _destRegIdx[0]);
< }
<
< ss << ", ";
<
< if (_numSrcRegs > 0) {
< printReg(ss, _srcRegIdx[0]);
< ss << ", ";
< }
<
< return ss.str();
< }
<
< std::string PredIntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
< {
< std::stringstream ss;
<
< ccprintf(ss, "%-10s ", mnemonic);
<
< if (_numDestRegs > 0) {
< printReg(ss, _destRegIdx[0]);
< }
<
< ss << ", ";
<
< if (_numSrcRegs > 0) {
< printReg(ss, _srcRegIdx[0]);
< ss << ", ";
< }
<
< return ss.str();
< }
<
< std::string PredMacroOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
< {
< std::stringstream ss;
<
< ccprintf(ss, "%-10s ", mnemonic);
<
< return ss.str();
< }
<
< }};
<