data.isa (7256:4229d955ee8e) data.isa (7258:6e8a3c0a2a40)
1// Copyright (c) 2010 ARM Limited
2// All rights reserved
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

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56 const uint32_t lsb = bits(machInst, 11, 7);
57 const uint32_t msb = lsb + bits(machInst, 20, 16);
58 if (bits(op1, 2, 1) == 0x3) {
59 return new Ubfx(machInst, ra, rn, lsb, msb);
60 } else if (bits(op1, 2, 1) == 0x1) {
61 return new Sbfx(machInst, ra, rn, lsb, msb);
62 }
63 } else if (bits(op2, 1, 0) == 0x0 && bits(op1, 2, 1) == 0x2) {
1// Copyright (c) 2010 ARM Limited
2// All rights reserved
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

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56 const uint32_t lsb = bits(machInst, 11, 7);
57 const uint32_t msb = lsb + bits(machInst, 20, 16);
58 if (bits(op1, 2, 1) == 0x3) {
59 return new Ubfx(machInst, ra, rn, lsb, msb);
60 } else if (bits(op1, 2, 1) == 0x1) {
61 return new Sbfx(machInst, ra, rn, lsb, msb);
62 }
63 } else if (bits(op2, 1, 0) == 0x0 && bits(op1, 2, 1) == 0x2) {
64 const uint32_t lsb = bits(machInst, 11, 7);
65 const uint32_t msb = bits(machInst, 20, 16);
64 if (rn == 0xf) {
66 if (rn == 0xf) {
65 return new WarnUnimplemented("bfc", machInst);
67 return new Bfc(machInst, ra, ra, lsb, msb);
66 } else {
68 } else {
67 return new WarnUnimplemented("bfi", machInst);
69 return new Bfi(machInst, ra, rn, lsb, msb);
68 }
69 }
70 return new Unknown(machInst);
71 }
72 '''
73}};
74
75def format ArmDataProcReg() {{

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1242 case 0x14:
1243 {
1244 const uint32_t lsb = bits(machInst, 7, 6) |
1245 (bits(machInst, 14, 12) << 2);
1246 const uint32_t msb = lsb + bits(machInst, 4, 0);
1247 return new Sbfx(machInst, rd, rn, lsb, msb);
1248 }
1249 case 0x16:
70 }
71 }
72 return new Unknown(machInst);
73 }
74 '''
75}};
76
77def format ArmDataProcReg() {{

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1244 case 0x14:
1245 {
1246 const uint32_t lsb = bits(machInst, 7, 6) |
1247 (bits(machInst, 14, 12) << 2);
1248 const uint32_t msb = lsb + bits(machInst, 4, 0);
1249 return new Sbfx(machInst, rd, rn, lsb, msb);
1250 }
1251 case 0x16:
1250 if (rn == 0xf) {
1251 return new WarnUnimplemented("bfc", machInst);
1252 } else {
1253 return new WarnUnimplemented("bfi", machInst);
1252 {
1253 const uint32_t lsb = bits(machInst, 7, 6) |
1254 (bits(machInst, 14, 12) << 2);
1255 const uint32_t msb = bits(machInst, 4, 0);
1256 if (rn == 0xf) {
1257 return new Bfc(machInst, rd, rd, lsb, msb);
1258 } else {
1259 return new Bfi(machInst, rd, rn, lsb, msb);
1260 }
1254 }
1255 case 0x1a:
1256 if (!(bits(machInst, 14, 12) || bits(machInst, 7, 6))) {
1257 const uint32_t satImm = bits(machInst, 4, 0);
1258 return new Usat16(machInst, rd, satImm, rn);
1259 }
1260 // Fall through on purpose...
1261 case 0x18:

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1262 case 0x1a:
1263 if (!(bits(machInst, 14, 12) || bits(machInst, 7, 6))) {
1264 const uint32_t satImm = bits(machInst, 4, 0);
1265 return new Usat16(machInst, rd, satImm, rn);
1266 }
1267 // Fall through on purpose...
1268 case 0x18:

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