data.isa (7195:ccd270981263) data.isa (7201:253d16049184)
1// Copyright (c) 2010 ARM Limited
2// All rights reserved
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

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526 }
527 case 0x3:
528 return new Cbz(machInst,
529 (bits(machInst, 9) << 6) |
530 (bits(machInst, 7, 3) << 1),
531 (IntRegIndex)(uint32_t)bits(machInst, 2, 0));
532 case 0x4:
533 case 0x5:
1// Copyright (c) 2010 ARM Limited
2// All rights reserved
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

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526 }
527 case 0x3:
528 return new Cbz(machInst,
529 (bits(machInst, 9) << 6) |
530 (bits(machInst, 7, 3) << 1),
531 (IntRegIndex)(uint32_t)bits(machInst, 2, 0));
532 case 0x4:
533 case 0x5:
534 return new WarnUnimplemented("push", machInst);
534 {
535 const uint32_t m = bits(machInst, 8);
536 const uint32_t regList = bits(machInst, 7, 0) | (m << 14);
537 return new LdmStm(machInst, INTREG_SP, false, false, false,
538 true, false, regList);
539 }
535 case 0x6:
536 {
537 const uint32_t opBits = bits(machInst, 7, 5);
538 if (opBits == 2) {
539 return new WarnUnimplemented("setend", machInst);
540 } else if (opBits == 3) {
541 return new WarnUnimplemented("cps", machInst);
542 }

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560 break;
561 case 0xb:
562 return new Cbnz(machInst,
563 (bits(machInst, 9) << 6) |
564 (bits(machInst, 7, 3) << 1),
565 (IntRegIndex)(uint32_t)bits(machInst, 2, 0));
566 case 0xc:
567 case 0xd:
540 case 0x6:
541 {
542 const uint32_t opBits = bits(machInst, 7, 5);
543 if (opBits == 2) {
544 return new WarnUnimplemented("setend", machInst);
545 } else if (opBits == 3) {
546 return new WarnUnimplemented("cps", machInst);
547 }

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565 break;
566 case 0xb:
567 return new Cbnz(machInst,
568 (bits(machInst, 9) << 6) |
569 (bits(machInst, 7, 3) << 1),
570 (IntRegIndex)(uint32_t)bits(machInst, 2, 0));
571 case 0xc:
572 case 0xd:
568 return new WarnUnimplemented("pop", machInst);
573 {
574 const uint32_t p = bits(machInst, 8);
575 const uint32_t regList = bits(machInst, 7, 0) | (p << 15);
576 return new LdmStm(machInst, INTREG_SP, true, true, false,
577 true, true, regList);
578 }
569 case 0xe:
570 return new WarnUnimplemented("bkpt", machInst);
571 case 0xf:
572 if (bits(machInst, 3, 0) != 0)
573 return new WarnUnimplemented("it", machInst);
574 switch (bits(machInst, 7, 4)) {
575 case 0x0:
576 return new WarnUnimplemented("nop", machInst);

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579 case 0xe:
580 return new WarnUnimplemented("bkpt", machInst);
581 case 0xf:
582 if (bits(machInst, 3, 0) != 0)
583 return new WarnUnimplemented("it", machInst);
584 switch (bits(machInst, 7, 4)) {
585 case 0x0:
586 return new WarnUnimplemented("nop", machInst);

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