data.isa (12595:b5a51007feac) data.isa (13354:c1bdac713ae5)
1// Copyright (c) 2010,2017-2018 ARM Limited
2// All rights reserved
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

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1109 switch (OPCODE) {
1110 case 0x8:
1111 return new MovImm(machInst, (IntRegIndex)(uint32_t)RD,
1112 (IntRegIndex)INTREG_ZERO,
1113 bits(machInst, 11, 0) | (bits(machInst, 19, 16) << 12),
1114 false);
1115 case 0x9:
1116 if (RN == 0) {
1// Copyright (c) 2010,2017-2018 ARM Limited
2// All rights reserved
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

--- 1100 unchanged lines hidden (view full) ---

1109 switch (OPCODE) {
1110 case 0x8:
1111 return new MovImm(machInst, (IntRegIndex)(uint32_t)RD,
1112 (IntRegIndex)INTREG_ZERO,
1113 bits(machInst, 11, 0) | (bits(machInst, 19, 16) << 12),
1114 false);
1115 case 0x9:
1116 if (RN == 0) {
1117 switch (IMM) {
1118 case 0x0:
1119 return new NopInst(machInst);
1120 case 0x1:
1121 return new YieldInst(machInst);
1122 case 0x2:
1123 return new WfeInst(machInst);
1124 case 0x3:
1125 return new WfiInst(machInst);
1126 case 0x4:
1127 return new SevInst(machInst);
1128 default:
1129 return new Unknown(machInst);
1117 if ((IMM & 0xf0) == 0xf0) {
1118 return new Dbg(machInst);
1119 } else {
1120 switch (IMM) {
1121 case 0x0:
1122 return new NopInst(machInst);
1123 case 0x1:
1124 return new YieldInst(machInst);
1125 case 0x2:
1126 return new WfeInst(machInst);
1127 case 0x3:
1128 return new WfiInst(machInst);
1129 case 0x4:
1130 return new SevInst(machInst);
1131 case 0x5:
1132 return new WarnUnimplemented(
1133 "sevl", machInst);
1134 case 0x10:
1135 return new WarnUnimplemented(
1136 "esb", machInst);
1137 case 0x12:
1138 return new WarnUnimplemented(
1139 "tsb csync", machInst);
1140 case 0x14:
1141 return new WarnUnimplemented(
1142 "csdb", machInst);
1143 default:
1144 return new WarnUnimplemented(
1145 "unallocated_hint", machInst);
1146 }
1130 }
1131 } else {
1132 return new MsrCpsrImm(machInst, imm, byteMask);
1133 }
1134 case 0xa:
1135 {
1136 const uint32_t timm = (bits(machInst, 19, 16) << 12) |
1137 bits(machInst, 11, 0);

--- 434 unchanged lines hidden --- 		1147 }
1148 } else {
1149 return new MsrCpsrImm(machInst, imm, byteMask);
1150 }
1151 case 0xa:
1152 {
1153 const uint32_t timm = (bits(machInst, 19, 16) << 12) |
1154 bits(machInst, 11, 0);

--- 434 unchanged lines hidden ---