1// Copyright (c) 2010,2017-2018 ARM Limited 2// All rights reserved 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 816 unchanged lines hidden (view full) --- 825 return new Sel(machInst, rd, rn, rm); 826 } 827 break; 828 case 0x3: 829 if (op2 == 0) { 830 return new Clz(machInst, rd, rm); 831 } 832 break; |
833 } 834 } else if (bits(op1, 3, 2) == 0x3 && bits(op2, 3, 2) == 0x2) { 835 const uint32_t op1 = bits(machInst, 22, 20); 836 const uint32_t op2 = bits(machInst, 5, 4); 837 const IntRegIndex rd = 838 (IntRegIndex)(uint32_t)bits(machInst, 11, 8); 839 const IntRegIndex rm = 840 (IntRegIndex)(uint32_t)bits(machInst, 3, 0); 841 switch (op1) { |
842 case 0x4: 843 switch (op2) { 844 case 0x0: 845 return new Crc32b(machInst, rd, rn, rm); 846 case 0x1: 847 return new Crc32h(machInst, rd, rn, rm); 848 case 0x2: 849 return new Crc32w(machInst, rd, rn, rm); --- 748 unchanged lines hidden --- |