159c159
< if (op2 == 0x3) {
---
> {
166,171c166,175
< const uint32_t rotation =
< (uint32_t)bits(machInst, 11, 10) << 3;
< if (a == 0xf) {
< return new Sxtb16(machInst, rd, rotation, rm);
< } else {
< return new Sxtab16(machInst, rd, rn, rm, rotation);
---
> if (op2 == 0x3) {
> const uint32_t rotation =
> (uint32_t)bits(machInst, 11, 10) << 3;
> if (a == 0xf) {
> return new Sxtb16(machInst, rd, rotation, rm);
> } else {
> return new Sxtab16(machInst, rd, rn, rm, rotation);
> }
> } else if (op2 == 0x5) {
> return new Sel(machInst, rd, rn, rm);
173,174d176
< } else if (op2 == 0x5) {
< return new WarnUnimplemented("sel", machInst);
747a750,753
> const IntRegIndex rd =
> (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
> const IntRegIndex rm =
> (IntRegIndex)(uint32_t)bits(machInst, 3, 0);
750,768c756,768
< {
< IntRegIndex rd =
< (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
< IntRegIndex rm =
< (IntRegIndex)(uint32_t)bits(machInst, 3, 0);
< switch (op2) {
< case 0x0:
< return new QaddRegCc(machInst, rd,
< rm, rn, 0, LSL);
< case 0x1:
< return new QdaddRegCc(machInst, rd,
< rm, rn, 0, LSL);
< case 0x2:
< return new QsubRegCc(machInst, rd,
< rm, rn, 0, LSL);
< case 0x3:
< return new QdsubRegCc(machInst, rd,
< rm, rn, 0, LSL);
< }
---
> switch (op2) {
> case 0x0:
> return new QaddRegCc(machInst, rd,
> rm, rn, 0, LSL);
> case 0x1:
> return new QdaddRegCc(machInst, rd,
> rm, rn, 0, LSL);
> case 0x2:
> return new QsubRegCc(machInst, rd,
> rm, rn, 0, LSL);
> case 0x3:
> return new QdsubRegCc(machInst, rd,
> rm, rn, 0, LSL);
772,785c772,780
< {
< IntRegIndex rd =
< (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
< IntRegIndex rm = rn;
< switch (op2) {
< case 0x0:
< return new Rev(machInst, rd, rm);
< case 0x1:
< return new Rev16(machInst, rd, rm);
< case 0x2:
< return new WarnUnimplemented("rbit", machInst);
< case 0x3:
< return new Revsh(machInst, rd, rm);
< }
---
> switch (op2) {
> case 0x0:
> return new Rev(machInst, rd, rn);
> case 0x1:
> return new Rev16(machInst, rd, rn);
> case 0x2:
> return new WarnUnimplemented("rbit", machInst);
> case 0x3:
> return new Revsh(machInst, rd, rn);
790c785
< return new WarnUnimplemented("sel", machInst);
---
> return new Sel(machInst, rd, rn, rm);