intregs.hh (7171:75996fe47db8) | intregs.hh (7310:239ab4e0c7d4) |
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1/* | 1/* |
2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * |
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2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright --- 18 unchanged lines hidden (view full) --- 28 * Authors: Gabe Black 29 */ 30 31#include <assert.h> 32 33#ifndef __ARCH_ARM_INTREGS_HH__ 34#define __ARCH_ARM_INTREGS_HH__ 35 | 14 * Copyright (c) 2009 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright --- 18 unchanged lines hidden (view full) --- 40 * Authors: Gabe Black 41 */ 42 43#include <assert.h> 44 45#ifndef __ARCH_ARM_INTREGS_HH__ 46#define __ARCH_ARM_INTREGS_HH__ 47 |
48#include "arch/arm/types.hh" 49 |
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36namespace ArmISA 37{ 38 39enum IntRegIndex 40{ 41 /* All the unique register indices. */ 42 INTREG_R0, 43 INTREG_R1, --- 273 unchanged lines hidden (view full) --- 317 318static inline IntRegIndex 319INTREG_FIQ(unsigned index) 320{ 321 assert(index < NUM_ARCH_INTREGS); 322 return IntRegFiqMap[index]; 323} 324 | 50namespace ArmISA 51{ 52 53enum IntRegIndex 54{ 55 /* All the unique register indices. */ 56 INTREG_R0, 57 INTREG_R1, --- 273 unchanged lines hidden (view full) --- 331 332static inline IntRegIndex 333INTREG_FIQ(unsigned index) 334{ 335 assert(index < NUM_ARCH_INTREGS); 336 return IntRegFiqMap[index]; 337} 338 |
325static inline IntRegIndex 326intRegForceUser(unsigned index) 327{ 328 assert(index < NUM_ARCH_INTREGS); | 339static const unsigned intRegsPerMode = NUM_INTREGS; |
329 | 340 |
330 return index == 15 ? (IntRegIndex)15 : (IntRegIndex)(index + NUM_INTREGS); | 341static inline int 342intRegInMode(OperatingMode mode, int reg) 343{ 344 assert(reg < NUM_ARCH_INTREGS); 345 return mode * intRegsPerMode + reg; |
331} 332 333} 334 335#endif | 346} 347 348} 349 350#endif |