misc64.cc (10037:5cac77888310) misc64.cc (12104:edd63f9c6184)
1/*
2 * Copyright (c) 2011-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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39
40#include "arch/arm/insts/misc64.hh"
41
42std::string
43RegRegImmImmOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
44{
45 std::stringstream ss;
46 printMnemonic(ss, "", false);
1/*
2 * Copyright (c) 2011-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 30 unchanged lines hidden (view full) ---

39
40#include "arch/arm/insts/misc64.hh"
41
42std::string
43RegRegImmImmOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
44{
45 std::stringstream ss;
46 printMnemonic(ss, "", false);
47 printReg(ss, dest);
47 printIntReg(ss, dest);
48 ss << ", ";
48 ss << ", ";
49 printReg(ss, op1);
49 printIntReg(ss, op1);
50 ccprintf(ss, ", #%d, #%d", imm1, imm2);
51 return ss.str();
52}
53
54std::string
55RegRegRegImmOp64::generateDisassembly(
56 Addr pc, const SymbolTable *symtab) const
57{
58 std::stringstream ss;
59 printMnemonic(ss, "", false);
50 ccprintf(ss, ", #%d, #%d", imm1, imm2);
51 return ss.str();
52}
53
54std::string
55RegRegRegImmOp64::generateDisassembly(
56 Addr pc, const SymbolTable *symtab) const
57{
58 std::stringstream ss;
59 printMnemonic(ss, "", false);
60 printReg(ss, dest);
60 printIntReg(ss, dest);
61 ss << ", ";
61 ss << ", ";
62 printReg(ss, op1);
62 printIntReg(ss, op1);
63 ss << ", ";
63 ss << ", ";
64 printReg(ss, op2);
64 printIntReg(ss, op2);
65 ccprintf(ss, ", #%d", imm);
66 return ss.str();
67}
68
69std::string
70UnknownOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
71{
72 return csprintf("%-10s (inst %#08x)", "unknown", machInst);
73}
65 ccprintf(ss, ", #%d", imm);
66 return ss.str();
67}
68
69std::string
70UnknownOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
71{
72 return csprintf("%-10s (inst %#08x)", "unknown", machInst);
73}