47c47
< printReg(ss, dest);
---
> printIntReg(ss, dest);
49c49
< printReg(ss, op1);
---
> printIntReg(ss, op1);
60c60
< printReg(ss, dest);
---
> printIntReg(ss, dest);
62c62
< printReg(ss, op1);
---
> printIntReg(ss, op1);
64c64
< printReg(ss, op2);
---
> printIntReg(ss, op2);