2c2
< * Copyright (c) 2011-2013,2017 ARM Limited
---
> * Copyright (c) 2011-2013,2017-2018 ARM Limited
42a43,51
> ImmOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
> {
> std::stringstream ss;
> printMnemonic(ss, "", false);
> ccprintf(ss, "#0x%x", imm);
> return ss.str();
> }
>
> std::string