misc.cc (9918:2c7219e2d999) misc.cc (10037:5cac77888310)
1/*
1/*
2 * Copyright (c) 2010 ARM Limited
2 * Copyright (c) 2010, 2012-2013 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license

--- 130 unchanged lines hidden (view full) ---

141 std::stringstream ss;
142 printMsrBase(ss);
143 ss << ", ";
144 printReg(ss, op1);
145 return ss.str();
146}
147
148std::string
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license

--- 130 unchanged lines hidden (view full) ---

141 std::stringstream ss;
142 printMsrBase(ss);
143 ss << ", ";
144 printReg(ss, op1);
145 return ss.str();
146}
147
148std::string
149MrrcOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
150{
151 std::stringstream ss;
152 printMnemonic(ss);
153 printReg(ss, dest);
154 ss << ", ";
155 printReg(ss, dest2);
156 ss << ", ";
157 printReg(ss, op1);
158 return ss.str();
159}
160
161std::string
162McrrOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
163{
164 std::stringstream ss;
165 printMnemonic(ss);
166 printReg(ss, dest);
167 ss << ", ";
168 printReg(ss, op1);
169 ss << ", ";
170 printReg(ss, op2);
171 return ss.str();
172}
173
174std::string
149ImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
150{
151 std::stringstream ss;
152 printMnemonic(ss);
153 ccprintf(ss, "#%d", imm);
154 return ss.str();
155}
156

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225 printReg(ss, dest);
226 ss << ", ";
227 printReg(ss, op1);
228 ccprintf(ss, ", #%d", imm);
229 return ss.str();
230}
231
232std::string
175ImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
176{
177 std::stringstream ss;
178 printMnemonic(ss);
179 ccprintf(ss, "#%d", imm);
180 return ss.str();
181}
182

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251 printReg(ss, dest);
252 ss << ", ";
253 printReg(ss, op1);
254 ccprintf(ss, ", #%d", imm);
255 return ss.str();
256}
257
258std::string
259RegImmImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
260{
261 std::stringstream ss;
262 printMnemonic(ss);
263 printReg(ss, dest);
264 ccprintf(ss, ", #%d, #%d", imm1, imm2);
265 return ss.str();
266}
267
268std::string
233RegRegImmImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
234{
235 std::stringstream ss;
236 printMnemonic(ss);
237 printReg(ss, dest);
238 ss << ", ";
239 printReg(ss, op1);
240 ccprintf(ss, ", #%d, #%d", imm1, imm2);

--- 31 unchanged lines hidden --- 		269RegRegImmImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
270{
271 std::stringstream ss;
272 printMnemonic(ss);
273 printReg(ss, dest);
274 ss << ", ";
275 printReg(ss, op1);
276 ccprintf(ss, ", #%d, #%d", imm1, imm2);

--- 31 unchanged lines hidden ---