misc.cc (7331:0897d3ccea91) misc.cc (7332:2e611548bb5a)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 139 unchanged lines hidden (view full) ---

148{
149 std::stringstream ss;
150 printMnemonic(ss);
151 ccprintf(ss, "#%d", imm);
152 return ss.str();
153}
154
155std::string
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 139 unchanged lines hidden (view full) ---

148{
149 std::stringstream ss;
150 printMnemonic(ss);
151 ccprintf(ss, "#%d", imm);
152 return ss.str();
153}
154
155std::string
156RegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
157{
158 std::stringstream ss;
159 printMnemonic(ss);
160 printReg(ss, dest);
161 ccprintf(ss, ", #%d", imm);
162 return ss.str();
163}
164
165std::string
156RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
157{
158 std::stringstream ss;
159 printMnemonic(ss);
160 printReg(ss, dest);
161 ss << ", ";
162 printReg(ss, op1);
163 return ss.str();

--- 90 unchanged lines hidden ---
166RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
167{
168 std::stringstream ss;
169 printMnemonic(ss);
170 printReg(ss, dest);
171 ss << ", ";
172 printReg(ss, op1);
173 return ss.str();

--- 90 unchanged lines hidden ---