1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 192 unchanged lines hidden (view full) --- 201 ss << ", "; 202 printReg(ss, op1); 203 ss << ", "; 204 printReg(ss, op2); 205 return ss.str(); 206} 207 208std::string |
209RegRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 210{ 211 std::stringstream ss; 212 printMnemonic(ss); 213 printReg(ss, dest); 214 ss << ", "; 215 printReg(ss, op1); 216 ccprintf(ss, ", #%d", imm); 217 return ss.str(); 218} 219 220std::string |
221RegRegImmImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 222{ 223 std::stringstream ss; 224 printMnemonic(ss); 225 printReg(ss, dest); 226 ss << ", "; 227 printReg(ss, op1); 228 ccprintf(ss, ", #%d, #%d", imm1, imm2); --- 25 unchanged lines hidden --- |