1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 155 unchanged lines hidden (view full) --- 164 printReg(ss, op1); 165 ss << ", "; 166 printReg(ss, op2); 167 ccprintf(ss, ", #%d", imm); 168 return ss.str(); 169} 170 171std::string |
172RegRegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 173{ 174 std::stringstream ss; 175 printMnemonic(ss); 176 printReg(ss, dest); 177 ss << ", "; 178 printReg(ss, op1); 179 ss << ", "; 180 printReg(ss, op2); 181 return ss.str(); 182} 183 184std::string |
185RegImmRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 186{ 187 std::stringstream ss; 188 printMnemonic(ss); 189 printReg(ss, dest); 190 ccprintf(ss, ", #%d, ", imm); 191 printReg(ss, op1); 192 return ss.str(); --- 13 unchanged lines hidden --- |