1/* 2 * Copyright (c) 2010, 2012-2013, 2017-2018 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 325 unchanged lines hidden (view full) --- 334 flags[IsNonSpeculative] = true; 335 iss = _iss; 336 miscReg = _miscReg; 337} 338 339Fault 340McrMrcMiscInst::execute(ExecContext *xc, Trace::InstRecord *traceData) const 341{ |
342 bool hypTrap = mcrMrc15TrapToHyp(miscReg, xc->tcBase(), iss); |
343 |
344 if (hypTrap) { 345 return std::make_shared<HypervisorTrap>(machInst, iss, 346 EC_TRAPPED_CP15_MCR_MRC); 347 } else { 348 return NoFault; 349 } 350} 351 --- 7 unchanged lines hidden (view full) --- 359 ExtMachInst _machInst, uint64_t _iss, 360 MiscRegIndex _miscReg) 361 : McrMrcMiscInst(_mnemonic, _machInst, _iss, _miscReg) 362{} 363 364Fault 365McrMrcImplDefined::execute(ExecContext *xc, Trace::InstRecord *traceData) const 366{ |
367 bool hypTrap = mcrMrc15TrapToHyp(miscReg, xc->tcBase(), iss); |
368 |
369 if (hypTrap) { 370 return std::make_shared<HypervisorTrap>(machInst, iss, 371 EC_TRAPPED_CP15_MCR_MRC); 372 } else { 373 return std::make_shared<UndefinedInstruction>(machInst, false, 374 mnemonic); 375 } 376} 377 378std::string 379McrMrcImplDefined::generateDisassembly(Addr pc, 380 const SymbolTable *symtab) const 381{ 382 return csprintf("%-10s (implementation defined)", mnemonic); 383} |