1/* 2 * Copyright (c) 2010, 2012-2013 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 245 unchanged lines hidden (view full) --- 254 return ss.str(); 255} 256 257std::string 258MiscRegRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 259{ 260 std::stringstream ss; 261 printMnemonic(ss); |
262 printMiscReg(ss, dest); |
263 ss << ", "; 264 printIntReg(ss, op1); |
265 return ss.str(); 266} 267 268std::string 269RegMiscRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 270{ 271 std::stringstream ss; 272 printMnemonic(ss); 273 printIntReg(ss, dest); 274 ss << ", "; |
275 printMiscReg(ss, op1); |
276 return ss.str(); 277} 278 279std::string 280RegImmImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 281{ 282 std::stringstream ss; 283 printMnemonic(ss); --- 45 unchanged lines hidden --- |