1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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139 std::stringstream ss;
140 printMsrBase(ss);
141 ss << ", ";
142 printReg(ss, op1);
143 return ss.str();
144}
145
146std::string
147RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
148{
149 std::stringstream ss;
150 printMnemonic(ss);
151 printReg(ss, dest);
152 ss << ", ";
153 printReg(ss, op1);
154 return ss.str();
155}

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