Cross Reference: /gem5/src/arch/arm/insts/data64.cc

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< printReg(ss, dest);
---
> printIntReg(ss, dest);
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< printReg(ss, dest);
---
> printIntReg(ss, dest);
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< printReg(ss, op1);
---
> printIntReg(ss, op1);
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< printReg(ss, dest);
---
> printIntReg(ss, dest);
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< printReg(ss, op1);
---
> printIntReg(ss, op1);
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< printReg(ss, dest);
---
> printIntReg(ss, dest);
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< printReg(ss, op1);
---
> printIntReg(ss, op1);
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< printReg(ss, dest);
---
> printIntReg(ss, dest);
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< printReg(ss, op1);
---
> printIntReg(ss, op1);
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< printReg(ss, op2);
---
> printIntReg(ss, op2);
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< printReg(ss, dest);
---
> printIntReg(ss, dest);
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< printReg(ss, op1);
---
> printIntReg(ss, op1);
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< printReg(ss, op2);
---
> printIntReg(ss, op2);
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< printReg(ss, dest);
---
> printIntReg(ss, dest);
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< printReg(ss, op1);
---
> printIntReg(ss, op1);
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< printReg(ss, op2);
---
> printIntReg(ss, op2);
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< printReg(ss, op3);
---
> printIntReg(ss, op3);
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< printReg(ss, op1);
---
> printIntReg(ss, op1);
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< printReg(ss, op1);
---
> printIntReg(ss, op1);
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< printReg(ss, op2);
---
> printIntReg(ss, op2);
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< printReg(ss, dest);
---
> printIntReg(ss, dest);
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< printReg(ss, op1);
---
> printIntReg(ss, op1);
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< printReg(ss, op2);
---
> printIntReg(ss, op2);