branch.hh (8909:7fa0a081f12f) branch.hh (12640:02188fc84bae)
1/*
1/*
2 * Copyright (c) 2010 ARM Limited
2 * Copyright (c) 2010,2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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53 int32_t imm;
54
55 public:
56 BranchImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
57 int32_t _imm) :
58 PredOp(mnem, _machInst, __opClass), imm(_imm)
59 {}
60
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

--- 42 unchanged lines hidden (view full) ---

53 int32_t imm;
54
55 public:
56 BranchImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
57 int32_t _imm) :
58 PredOp(mnem, _machInst, __opClass), imm(_imm)
59 {}
60
61 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
61};
62
63// Conditionally Branch to a target computed with an immediate
64class BranchImmCond : public BranchImm
65{
66 public:
67 BranchImmCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
68 int32_t _imm, ConditionCode _condCode) :

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80 protected:
81 IntRegIndex op1;
82
83 public:
84 BranchReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
85 IntRegIndex _op1) :
86 PredOp(mnem, _machInst, __opClass), op1(_op1)
87 {}
62};
63
64// Conditionally Branch to a target computed with an immediate
65class BranchImmCond : public BranchImm
66{
67 public:
68 BranchImmCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
69 int32_t _imm, ConditionCode _condCode) :

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81 protected:
82 IntRegIndex op1;
83
84 public:
85 BranchReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
86 IntRegIndex _op1) :
87 PredOp(mnem, _machInst, __opClass), op1(_op1)
88 {}
89
90 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
88};
89
90// Conditionally Branch to a target computed with a register
91class BranchRegCond : public BranchReg
92{
93 public:
94 BranchRegCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
95 IntRegIndex _op1, ConditionCode _condCode) :

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108 IntRegIndex op1;
109 IntRegIndex op2;
110
111 public:
112 BranchRegReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
113 IntRegIndex _op1, IntRegIndex _op2) :
114 PredOp(mnem, _machInst, __opClass), op1(_op1), op2(_op2)
115 {}
91};
92
93// Conditionally Branch to a target computed with a register
94class BranchRegCond : public BranchReg
95{
96 public:
97 BranchRegCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
98 IntRegIndex _op1, ConditionCode _condCode) :

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111 IntRegIndex op1;
112 IntRegIndex op2;
113
114 public:
115 BranchRegReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
116 IntRegIndex _op1, IntRegIndex _op2) :
117 PredOp(mnem, _machInst, __opClass), op1(_op1), op2(_op2)
118 {}
119
120 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
116};
117
118// Branch to a target computed with an immediate and a register
119class BranchImmReg : public PredOp
120{
121 protected:
122 int32_t imm;
123 IntRegIndex op1;
124
125 public:
126 BranchImmReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
127 int32_t _imm, IntRegIndex _op1) :
128 PredOp(mnem, _machInst, __opClass), imm(_imm), op1(_op1)
129 {}
130};
131
132}
133
134#endif //__ARCH_ARM_INSTS_BRANCH_HH__
121};
122
123// Branch to a target computed with an immediate and a register
124class BranchImmReg : public PredOp
125{
126 protected:
127 int32_t imm;
128 IntRegIndex op1;
129
130 public:
131 BranchImmReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
132 int32_t _imm, IntRegIndex _op1) :
133 PredOp(mnem, _machInst, __opClass), imm(_imm), op1(_op1)
134 {}
135};
136
137}
138
139#endif //__ARCH_ARM_INSTS_BRANCH_HH__