branch.hh (8146:18368caa8489) branch.hh (8909:7fa0a081f12f)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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58 PredOp(mnem, _machInst, __opClass), imm(_imm)
59 {}
60
61};
62
63// Conditionally Branch to a target computed with an immediate
64class BranchImmCond : public BranchImm
65{
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 49 unchanged lines hidden (view full) ---

58 PredOp(mnem, _machInst, __opClass), imm(_imm)
59 {}
60
61};
62
63// Conditionally Branch to a target computed with an immediate
64class BranchImmCond : public BranchImm
65{
66 protected:
67 // This will mask the condition code stored for PredOp. Ideally these two
68 // class would cooperate, but they're not set up to do that at the moment.
69 ConditionCode condCode;
70
71 public:
72 BranchImmCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
73 int32_t _imm, ConditionCode _condCode) :
66 public:
67 BranchImmCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
68 int32_t _imm, ConditionCode _condCode) :
74 BranchImm(mnem, _machInst, __opClass, _imm), condCode(_condCode)
75 {}
69 BranchImm(mnem, _machInst, __opClass, _imm)
70 {
71 // Only update if this isn't part of an IT block
72 if (!machInst.itstateMask)
73 condCode = _condCode;
74 }
76};
77
78// Branch to a target computed with a register
79class BranchReg : public PredOp
80{
81 protected:
82 IntRegIndex op1;
83
84 public:
85 BranchReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
86 IntRegIndex _op1) :
87 PredOp(mnem, _machInst, __opClass), op1(_op1)
88 {}
89};
90
91// Conditionally Branch to a target computed with a register
92class BranchRegCond : public BranchReg
93{
75};
76
77// Branch to a target computed with a register
78class BranchReg : public PredOp
79{
80 protected:
81 IntRegIndex op1;
82
83 public:
84 BranchReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
85 IntRegIndex _op1) :
86 PredOp(mnem, _machInst, __opClass), op1(_op1)
87 {}
88};
89
90// Conditionally Branch to a target computed with a register
91class BranchRegCond : public BranchReg
92{
94 protected:
95 // This will mask the condition code stored for PredOp. Ideally these two
96 // class would cooperate, but they're not set up to do that at the moment.
97 ConditionCode condCode;
98
99 public:
100 BranchRegCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
101 IntRegIndex _op1, ConditionCode _condCode) :
93 public:
94 BranchRegCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
95 IntRegIndex _op1, ConditionCode _condCode) :
102 BranchReg(mnem, _machInst, __opClass, _op1), condCode(_condCode)
103 {}
96 BranchReg(mnem, _machInst, __opClass, _op1)
97 {
98 // Only update if this isn't part of an IT block
99 if (!machInst.itstateMask)
100 condCode = _condCode;
101 }
104};
105
106// Branch to a target computed with two registers
107class BranchRegReg : public PredOp
108{
109 protected:
110 IntRegIndex op1;
111 IntRegIndex op2;

--- 25 unchanged lines hidden --- 		102};
103
104// Branch to a target computed with two registers
105class BranchRegReg : public PredOp
106{
107 protected:
108 IntRegIndex op1;
109 IntRegIndex op2;

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