branch.hh (7099:1949ba4db2cf) | branch.hh (7144:097e00bcf084) |
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1/* Copyright (c) 2007-2008 The Florida State University 2 * All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are 6 * met: redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer; 8 * redistributions in binary form must reproduce the above copyright --- 93 unchanged lines hidden (view full) --- 102 : PredOp(mnem, _machInst, __opClass) 103 { 104 } 105 106 std::string 107 generateDisassembly(Addr pc, const SymbolTable *symtab) const; 108}; 109 | 1/* Copyright (c) 2007-2008 The Florida State University 2 * All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are 6 * met: redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer; 8 * redistributions in binary form must reproduce the above copyright --- 93 unchanged lines hidden (view full) --- 102 : PredOp(mnem, _machInst, __opClass) 103 { 104 } 105 106 std::string 107 generateDisassembly(Addr pc, const SymbolTable *symtab) const; 108}; 109 |
110 111/** 112 * Base class for jumps (register-indirect control transfers). In 113 * the Arm ISA, these are always unconditional. 114 */ 115class Jump : public PCDependentDisassembly 116{ 117 protected: 118 119 /// Displacement to target address (signed). 120 int32_t disp; 121 122 uint32_t target; 123 124 public: 125 /// Constructor 126 Jump(const char *mnem, ExtMachInst _machInst, OpClass __opClass) 127 : PCDependentDisassembly(mnem, _machInst, __opClass), 128 disp(machInst.offset << 2) 129 { 130 } 131 132 Addr branchTarget(ThreadContext *tc) const; 133 134 std::string 135 generateDisassembly(Addr pc, const SymbolTable *symtab) const; 136}; | |
137} 138 139#endif //__ARCH_ARM_INSTS_BRANCH_HH__ | 110} 111 112#endif //__ARCH_ARM_INSTS_BRANCH_HH__ |