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< /* Copyright (c) 2007-2008 The Florida State University
---
> /*
> * Copyright (c) 2010 ARM Limited
> * All rights reserved
> *
> * The license below extends only to copyright in the software and shall
> * not be construed as granting a license to any other intellectual
> * property including but not limited to intellectual property relating
> * to a hardware implementation of the functionality of the software
> * licensed hereunder. You may use the software subject to the license
> * terms below provided that you ensure that this notice is replicated
> * unmodified and in its entirety in all distributions of the software,
> * modified or unmodified, in source code or in binary form.
> *
> * Copyright (c) 2007-2008 The Florida State University
65a79,162
> // Branch to a target computed with an immediate
> class BranchImm : public PredOp
> {
> protected:
> int32_t imm;
>
> public:
> BranchImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
> int32_t _imm) :
> PredOp(mnem, _machInst, __opClass), imm(_imm)
> {}
> };
>
> // Conditionally Branch to a target computed with an immediate
> class BranchImmCond : public BranchImm
> {
> protected:
> // This will mask the condition code stored for PredOp. Ideally these two
> // class would cooperate, but they're not set up to do that at the moment.
> ConditionCode condCode;
>
> public:
> BranchImmCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
> int32_t _imm, ConditionCode _condCode) :
> BranchImm(mnem, _machInst, __opClass, _imm), condCode(_condCode)
> {}
> };
>
> // Branch to a target computed with a register
> class BranchReg : public PredOp
> {
> protected:
> IntRegIndex op1;
>
> public:
> BranchReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
> IntRegIndex _op1) :
> PredOp(mnem, _machInst, __opClass), op1(_op1)
> {}
> };
>
> // Conditionally Branch to a target computed with a register
> class BranchRegCond : public BranchReg
> {
> protected:
> // This will mask the condition code stored for PredOp. Ideally these two
> // class would cooperate, but they're not set up to do that at the moment.
> ConditionCode condCode;
>
> public:
> BranchRegCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
> IntRegIndex _op1, ConditionCode _condCode) :
> BranchReg(mnem, _machInst, __opClass, _op1), condCode(_condCode)
> {}
> };
>
> // Branch to a target computed with two registers
> class BranchRegReg : public PredOp
> {
> protected:
> IntRegIndex op1;
> IntRegIndex op2;
>
> public:
> BranchRegReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
> IntRegIndex _op1, IntRegIndex _op2) :
> PredOp(mnem, _machInst, __opClass), op1(_op1), op2(_op2)
> {}
> };
>
> // Branch to a target computed with an immediate and a register
> class BranchImmReg : public PredOp
> {
> protected:
> int32_t imm;
> IntRegIndex op1;
>
> public:
> BranchImmReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
> int32_t _imm, IntRegIndex _op1) :
> PredOp(mnem, _machInst, __opClass), imm(_imm), op1(_op1)
> {}
> };
>