vtophys.cc (2665:a124942bacb8) vtophys.cc (2680:246e7104f744)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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31 */
32
33#include <string>
34
35#include "arch/alpha/ev5.hh"
36#include "arch/alpha/vtophys.hh"
37#include "base/chunk_generator.hh"
38#include "base/trace.hh"
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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31 */
32
33#include <string>
34
35#include "arch/alpha/ev5.hh"
36#include "arch/alpha/vtophys.hh"
37#include "base/chunk_generator.hh"
38#include "base/trace.hh"
39#include "cpu/exec_context.hh"
39#include "cpu/thread_context.hh"
40#include "mem/vport.hh"
41
42using namespace std;
43using namespace AlphaISA;
44
45AlphaISA::PageTableEntry
46AlphaISA::kernel_pte_lookup(FunctionalPort *mem, Addr ptbr, AlphaISA::VAddr vaddr)
47{

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80 panic("vtophys: ptbr is not set on virtual lookup");
81
82 DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr);
83
84 return paddr;
85}
86
87Addr
40#include "mem/vport.hh"
41
42using namespace std;
43using namespace AlphaISA;
44
45AlphaISA::PageTableEntry
46AlphaISA::kernel_pte_lookup(FunctionalPort *mem, Addr ptbr, AlphaISA::VAddr vaddr)
47{

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80 panic("vtophys: ptbr is not set on virtual lookup");
81
82 DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr);
83
84 return paddr;
85}
86
87Addr
88AlphaISA::vtophys(ExecContext *xc, Addr addr)
88AlphaISA::vtophys(ThreadContext *tc, Addr addr)
89{
90 AlphaISA::VAddr vaddr = addr;
89{
90 AlphaISA::VAddr vaddr = addr;
91 Addr ptbr = xc->readMiscReg(AlphaISA::IPR_PALtemp20);
91 Addr ptbr = tc->readMiscReg(AlphaISA::IPR_PALtemp20);
92 Addr paddr = 0;
93 //@todo Andrew couldn't remember why he commented some of this code
94 //so I put it back in. Perhaps something to do with gdb debugging?
95 if (AlphaISA::PcPAL(vaddr) && (vaddr < EV5::PalMax)) {
96 paddr = vaddr & ~ULL(1);
97 } else {
98 if (AlphaISA::IsK0Seg(vaddr)) {
99 paddr = AlphaISA::K0Seg2Phys(vaddr);
100 } else if (!ptbr) {
101 paddr = vaddr;
102 } else {
103 AlphaISA::PageTableEntry pte =
92 Addr paddr = 0;
93 //@todo Andrew couldn't remember why he commented some of this code
94 //so I put it back in. Perhaps something to do with gdb debugging?
95 if (AlphaISA::PcPAL(vaddr) && (vaddr < EV5::PalMax)) {
96 paddr = vaddr & ~ULL(1);
97 } else {
98 if (AlphaISA::IsK0Seg(vaddr)) {
99 paddr = AlphaISA::K0Seg2Phys(vaddr);
100 } else if (!ptbr) {
101 paddr = vaddr;
102 } else {
103 AlphaISA::PageTableEntry pte =
104 kernel_pte_lookup(xc->getPhysPort(), ptbr, vaddr);
104 kernel_pte_lookup(tc->getPhysPort(), ptbr, vaddr);
105 if (pte.valid())
106 paddr = pte.paddr() | vaddr.offset();
107 }
108 }
109
110
111 DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr);
112
113 return paddr;
114}
115
116
117void
105 if (pte.valid())
106 paddr = pte.paddr() | vaddr.offset();
107 }
108 }
109
110
111 DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr);
112
113 return paddr;
114}
115
116
117void
118AlphaISA::CopyOut(ExecContext *xc, void *dest, Addr src, size_t cplen)
118AlphaISA::CopyOut(ThreadContext *tc, void *dest, Addr src, size_t cplen)
119{
120 uint8_t *dst = (uint8_t *)dest;
119{
120 uint8_t *dst = (uint8_t *)dest;
121 VirtualPort *vp = xc->getVirtPort(xc);
121 VirtualPort *vp = tc->getVirtPort(tc);
122
123 vp->readBlob(src, dst, cplen);
124
122
123 vp->readBlob(src, dst, cplen);
124
125 xc->delVirtPort(vp);
125 tc->delVirtPort(vp);
126
127}
128
129void
126
127}
128
129void
130AlphaISA::CopyIn(ExecContext *xc, Addr dest, void *source, size_t cplen)
130AlphaISA::CopyIn(ThreadContext *tc, Addr dest, void *source, size_t cplen)
131{
132 uint8_t *src = (uint8_t *)source;
131{
132 uint8_t *src = (uint8_t *)source;
133 VirtualPort *vp = xc->getVirtPort(xc);
133 VirtualPort *vp = tc->getVirtPort(tc);
134
135 vp->writeBlob(dest, src, cplen);
136
134
135 vp->writeBlob(dest, src, cplen);
136
137 xc->delVirtPort(vp);
137 tc->delVirtPort(vp);
138}
139
140void
138}
139
140void
141AlphaISA::CopyStringOut(ExecContext *xc, char *dst, Addr vaddr, size_t maxlen)
141AlphaISA::CopyStringOut(ThreadContext *tc, char *dst, Addr vaddr, size_t maxlen)
142{
143 int len = 0;
142{
143 int len = 0;
144 VirtualPort *vp = xc->getVirtPort(xc);
144 VirtualPort *vp = tc->getVirtPort(tc);
145
146 do {
147 vp->readBlob(vaddr++, (uint8_t*)dst++, 1);
148 len++;
149 } while (len < maxlen && dst[len] != 0 );
150
145
146 do {
147 vp->readBlob(vaddr++, (uint8_t*)dst++, 1);
148 len++;
149 } while (len < maxlen && dst[len] != 0 );
150
151 xc->delVirtPort(vp);
151 tc->delVirtPort(vp);
152 dst[len] = 0;
153}
154
155void
152 dst[len] = 0;
153}
154
155void
156AlphaISA::CopyStringIn(ExecContext *xc, char *src, Addr vaddr)
156AlphaISA::CopyStringIn(ThreadContext *tc, char *src, Addr vaddr)
157{
157{
158 VirtualPort *vp = xc->getVirtPort(xc);
158 VirtualPort *vp = tc->getVirtPort(tc);
159 for (ChunkGenerator gen(vaddr, strlen(src), AlphaISA::PageBytes); !gen.done();
160 gen.next())
161 {
162 vp->writeBlob(gen.addr(), (uint8_t*)src, gen.size());
163 src += gen.size();
164 }
159 for (ChunkGenerator gen(vaddr, strlen(src), AlphaISA::PageBytes); !gen.done();
160 gen.next())
161 {
162 vp->writeBlob(gen.addr(), (uint8_t*)src, gen.size());
163 src += gen.size();
164 }
165 xc->delVirtPort(vp);
165 tc->delVirtPort(vp);
166}
166}