ev5.hh (5568:d14250d688d2) | ev5.hh (5569:baeee670d4ce) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 51 unchanged lines hidden (view full) --- 60inline bool PAddrIprSpace(Addr a) { return a >= ULL(0xFFFFFF00000); } 61const int PAddrImplBits = 44; // for Tsunami 62#endif 63const Addr PAddrImplMask = (ULL(1) << PAddrImplBits) - 1; 64const Addr PAddrUncachedBit39 = ULL(0x8000000000); 65const Addr PAddrUncachedBit40 = ULL(0x10000000000); 66const Addr PAddrUncachedBit43 = ULL(0x80000000000); 67const Addr PAddrUncachedMask = ULL(0x807ffffffff); // Clear PA<42:35> | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 51 unchanged lines hidden (view full) --- 60inline bool PAddrIprSpace(Addr a) { return a >= ULL(0xFFFFFF00000); } 61const int PAddrImplBits = 44; // for Tsunami 62#endif 63const Addr PAddrImplMask = (ULL(1) << PAddrImplBits) - 1; 64const Addr PAddrUncachedBit39 = ULL(0x8000000000); 65const Addr PAddrUncachedBit40 = ULL(0x10000000000); 66const Addr PAddrUncachedBit43 = ULL(0x80000000000); 67const Addr PAddrUncachedMask = ULL(0x807ffffffff); // Clear PA<42:35> |
68inline Addr Phys2K0Seg(Addr addr) | 68 69inline Addr 70Phys2K0Seg(Addr addr) |
69{ 70#if !ALPHA_TLASER 71 if (addr & PAddrUncachedBit43) { 72 addr &= PAddrUncachedMask; 73 addr |= PAddrUncachedBit40; 74 } 75#endif 76 return addr | K0SegBase; --- 46 unchanged lines hidden --- | 71{ 72#if !ALPHA_TLASER 73 if (addr & PAddrUncachedBit43) { 74 addr &= PAddrUncachedMask; 75 addr |= PAddrUncachedBit40; 76 } 77#endif 78 return addr | K0SegBase; --- 46 unchanged lines hidden --- |